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why are there no schematic view of standard cell

Recently downloaded 65nm Arm standard cell libraries, I see symbols and layouts, but no schematic view. How can one LVS when there is no schematic of the standard cell. Also, how can run a spectre simulation on a schematic that is a mix of standard cells, transistors or other customer blocks when there is no schematic view for the standard cells.

thanks

Perry

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  • ARM does not make the transistor level schematic designs available as a standard model view. The logic schematics can be purchased for an additional fee. Newer technologies will have schematics in the Cadence OA database format; however, older technologies may be formatted in the older Cadence CDBA database format, which was the standard at the time when the library was initially developed. Alternatively, you can import the ARM logic CDL netlists into Composer to generate your own schematic views, although they may be difficult to read that way.

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  • ARM does not make the transistor level schematic designs available as a standard model view. The logic schematics can be purchased for an additional fee. Newer technologies will have schematics in the Cadence OA database format; however, older technologies may be formatted in the older Cadence CDBA database format, which was the standard at the time when the library was initially developed. Alternatively, you can import the ARM logic CDL netlists into Composer to generate your own schematic views, although they may be difficult to read that way.

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