Arm Community
Site
Search
User
Site
Search
User
Groups
Education Hub
Distinguished Ambassadors
Open Source Software and Platforms
Research Collaboration and Enablement
Forums
AI and ML forum
Architectures and Processors forum
Arm Development Platforms forum
Arm Development Studio forum
Arm Virtual Hardware forum
Automotive forum
Compilers and Libraries forum
Graphics, Gaming, and VR forum
High Performance Computing (HPC) forum
Infrastructure Solutions forum
Internet of Things (IoT) forum
Keil forum
Morello forum
Operating Systems forum
SoC Design and Simulation forum
SystemReady Forum
Blogs
AI and ML blog
Announcements
Architectures and Processors blog
Automotive blog
Graphics, Gaming, and VR blog
High Performance Computing (HPC) blog
Infrastructure Solutions blog
Internet of Things (IoT) blog
Operating Systems blog
SoC Design and Simulation blog
Tools, Software and IDEs blog
Support
Arm Support Services
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
Community Help
More
Cancel
Support forums
SoC Design and Simulation forum
quiery about AHB burst mode
Jump...
Cancel
State
Not Answered
Locked
Locked
Replies
2 replies
Subscribers
88 subscribers
Views
8978 views
Users
0 members are here
AHB.AMBA
Bus Architecture
Options
Share
More actions
Cancel
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion
quiery about AHB burst mode
Harsharaj ellur
over 11 years ago
Note: This was originally posted on 19th November 2008 at
http://forums.arm.com
hi,
in the AHB burst mode is it the Master that drives consecutive address to slave, or is it that the master only sends the start address and Slave using this, HSIZE and HBURST calculates the next addresses in the burst??
if its the master who is driving consecutive address then why does it also have to send HSIZE and HBURST to slave?
And if it the Slave that is figuring it out asto what the next address in the burst is then why does the Timing diagram show that master is sending the addresses?
Parents
0
Colin Campbell
over 11 years ago
Note: This was originally posted on 19th November 2008 at
http://forums.arm.com
Hello Hertz,
> in the AHB burst mode is it the Master that drives consecutive
> address to slave, or is it that the master only sends the start
> address and Slave using this, HSIZE and HBURST calculates
> the next addresses in the burst??
The master drives the address for every beat of a burst, not just the start address.
> if its the master who is driving consecutive address then why
> does it also have to send HSIZE and HBURST to slave?
Simple slaves will just treat bursts as a series of individual transfers, so they need an address for each transfer.
More complex slaves can use the burst and size information to complete the burst transfer more efficiently (for example accessing DRAM).
Having the master provide both the address for each transfer, and the complete burst information, allows the most flexibility for slave designers.
> And if it the Slave that is figuring it out asto what the next
> address in the burst is then why does the Timing diagram
> show that master is sending the addresses?
As you are seeing diagrams where the master IS driving the address for each transfer, you probably already knew the answer to your first question
I am guessing you are comparing AHB to AXI, where in AXI only the start address is signaled, and the slave has to calculate the other addresses for a burst of transfers.
AXI tries to reduce the bandwidth requirements on the address channels by only sending the start address,
AHB tries to reduce the amount of duplicated address incrementer logic in each slave by issuing an address for each transfer in a burst.
JD
Cancel
Up
0
Down
Cancel
Reply
0
Colin Campbell
over 11 years ago
Note: This was originally posted on 19th November 2008 at
http://forums.arm.com
Hello Hertz,
> in the AHB burst mode is it the Master that drives consecutive
> address to slave, or is it that the master only sends the start
> address and Slave using this, HSIZE and HBURST calculates
> the next addresses in the burst??
The master drives the address for every beat of a burst, not just the start address.
> if its the master who is driving consecutive address then why
> does it also have to send HSIZE and HBURST to slave?
Simple slaves will just treat bursts as a series of individual transfers, so they need an address for each transfer.
More complex slaves can use the burst and size information to complete the burst transfer more efficiently (for example accessing DRAM).
Having the master provide both the address for each transfer, and the complete burst information, allows the most flexibility for slave designers.
> And if it the Slave that is figuring it out asto what the next
> address in the burst is then why does the Timing diagram
> show that master is sending the addresses?
As you are seeing diagrams where the master IS driving the address for each transfer, you probably already knew the answer to your first question
I am guessing you are comparing AHB to AXI, where in AXI only the start address is signaled, and the slave has to calculate the other addresses for a burst of transfers.
AXI tries to reduce the bandwidth requirements on the address channels by only sending the start address,
AHB tries to reduce the amount of duplicated address incrementer logic in each slave by issuing an address for each transfer in a burst.
JD
Cancel
Up
0
Down
Cancel
Children
No data