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AXI locked access

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Note: This was originally posted on 29th May 2008 at http://forums.arm.com

Does a locked request on either the read or write channel cause both channels to be locked? For example, one master request a locked write transaction to a slave, the read channel also will be locked? if both channels have been locked, whether a read unlock  access also can complete the whole locked sequence?
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  • 0 Arm Employee Badge
    Note: This was originally posted on 4th June 2008 at http://forums.arm.com

    > It means that if a master request a loced sequence, this sequence will be all WRITE transaction or otherwise?

    No, locked sequences can be (and usually are) made up of both read and write accesses.

    I think LOCK was originally intended for access sequences like the SWP instruction in the ARM instruction set, where you want to guarantee that the master can perform a single read access followed by a single write access to the same address, without any other master being able to access that address.

    However the AMBA specs try not to be too ARM-specific, so I guess the use of LOCK was left a bit less restrictive to allow other master designers to implement their own required locked access sequences, possibly with all READ or all WRITE sequences.

    But to support this in AXI you would need to ensure that both READ and WRITE channels get locked at the same time by either a read or write transaction, and similarly are unlocked by a read or write transaction.

    JD
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  • 0 Arm Employee Badge
    Note: This was originally posted on 4th June 2008 at http://forums.arm.com

    > It means that if a master request a loced sequence, this sequence will be all WRITE transaction or otherwise?

    No, locked sequences can be (and usually are) made up of both read and write accesses.

    I think LOCK was originally intended for access sequences like the SWP instruction in the ARM instruction set, where you want to guarantee that the master can perform a single read access followed by a single write access to the same address, without any other master being able to access that address.

    However the AMBA specs try not to be too ARM-specific, so I guess the use of LOCK was left a bit less restrictive to allow other master designers to implement their own required locked access sequences, possibly with all READ or all WRITE sequences.

    But to support this in AXI you would need to ensure that both READ and WRITE channels get locked at the same time by either a read or write transaction, and similarly are unlocked by a read or write transaction.

    JD
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