After the data transfers in a burst are over on the data channel, let us say the response gets delayed on the write response channel. During this waiting for response interval, are the data transfers from a subsequent burst allowed on the data channel?
Yes. AXI supports supports multiple outstanding transactions, meaning that more than 1 transaction can be issued without the response being received by the originating master. For AXI writes, multiple AW and W transfers could be sent without a B response being returned.
How many transactions can be outstanding depends on both the master issuing the transactions and the slave interface receiving them. Both of these components will have limit as to how many outstanding transactions they can track.