ArmRAL: Wrong usage of k0 in LDPC rate matching

Hello ArmRAL team,

I wanted to share with you a small problem I found in the bit selection of LDPC rate matching function in ArmRAL.

In this rate matching function, the starting position of bit selection k0 is calculated in the way instructed by 3GPP TS 38.212 and then used to copy the selected part of the encoder output.

But, this k0 is the starting position of bit selection in the encoder output including the filler bits. While bits are selected from a buffer 'in_bits' where filler bits were previously removed.

The result is that if k0 falls within or after the filler bits then bits selection starts at the wrong position which introduces an offset in the bit selection output with regard to the expected output.

I observed this difference by comparing ArmRAL LDPC encoding and rate matching against OpenAirInterface encoding and rate matching on identical inputs.

For redundancy versions 2 and 3 - k0 was then falling after the filler bits in my test case -, the output of ArmRAL rate matching had an offset, compared to OpenAirInterface rate matching, equal to the modulation order multiplied by the size of filler bits. The multiplication of the offset by the modulation order happens because of the interleaving.

Though, the issue is not specific to ArmRAL vs OpenAirInterface since the correct output of rate matching is well defined by the 3GPP TS 38.212 and ArmRAL rate matching is not compliant because of this issue.

I added a simple fix to ArmRAL rate matching which made both rate matching outputs identical.

The fix is to test where k0 falls relatively to the filler bits and reduce it accordingly before proceeding with bit selection.

I am attaching a patch with this fix.

Best Regards,

Romain BEURDOUCHE | Communication Systems PhD Student | Doctorant Systèmes de Communication
EURECOM | Campus SophiaTech | 450 route des Chappes | 06410 Biot Sophia Antipolis
Mobile : +33 (0)6 33 28 52 94
Office 416
www.eurecom.fr

diff --git a/src/UpperPHY/LDPC/arm_ldpc_rate_matching.cpp b/src/UpperPHY/LDPC/arm_ldpc_rate_matching.cpp
index 8efac64..c9cb8c4 100644
--- a/src/UpperPHY/LDPC/arm_ldpc_rate_matching.cpp
+++ b/src/UpperPHY/LDPC/arm_ldpc_rate_matching.cpp
@@ -59,6 +59,17 @@ void bit_selection(uint32_t z, uint32_t n, uint32_t e, uint32_t len_filler_bits,
     }
 
     in_bits = scratch_buf1;
+
+    // k0 is an index within the encoder output with filler bits
+    // but in_bits is now without filler bits
+    // so there is an offset to take into account depending on
+    // whether k0 falls before, within or after the filler bits
+    if(k0 > len_s_f_bits) {
+      k0 = k0 - len_filler_bits;
+    } else if(k0 > len_s_bits && k0 <= len_s_f_bits) {
+      k0 = len_s_bits;
+    }
+
   }
 
   // k0 depends on the redundancy version id.