reserved-memory { reserved: reserved@0xfac00000 { no-map; reg = <0 0xfac00000 0 0x1000000>; /* 16MB */ };};
I have a reserved memory area in my dtsi file. And that area resides in DRAM.
It will be used for Inter Processor Communication between M7(32 bit) and A7(64 bit).
And the actual mmap happens in an application (user space).
Currently the Linux generates the alignment fault when I use string libraries(i.e. memcpy), because they are the device memory region.
I think I can set it to be the "shareable / non-cacheable / normal memory region" since it's actually at DRAM and it's for IPC.
But I still couldn't find the proper compatible option that I can set that area as I want, and I am also not sure if it will work along with the mmap calls in user space.
What would be the right way to achieve this?
Is it a right way to prohibit all unaligned accesses to the reserved memory area when it's actually at DRAM?
Please give me an advice how I should approach the problem.
Thanks for reading!
I prefer such generic Linux question are better if asked on the mailing list as you get quick response and is not restricted to the views within this forum.
I will try to respond this time but people on the mailing list may disagree which we will know only if posted on the list. I think this was once discussed on the mailing list in context of SCMI. I will try to summaries based on what I can recall now.
The most fundamental aspect to consider here is to ensure both AP(A7 here) and the remote processor((M7 here) are in agreement with respect to how the buffers get mapped on either side.
If it is not the case of firmware on the same CPU, you need check if the DRAM is cache coherent with the remote process if you need to use memmap() which is normal cacheable memory. If there is any device register involved you need to use ioremap() or ioremap_wc().
A dedicated/separate SRAM is a bit tricky, usually that kind of buffer is accessed without going through the cache, so memremap() would be pure wrong. ioremap() is preferred here again.
The last and real trouble some case is when the memory buffer at a fixed location that is physical in DRAM and excluded from the memory visible to the OS, but accessed from a remote processor that is not cache-coherent with your CPU caches. I think this matches to your setup IIUC. Here, you can't use memremap() since you want an uncached mapping, but ioremap() is probably also wrong if the reserved area is mapped in the OS(I am not 100% sure on this last part, but a quick look at the code suggests it is correct but I may be wrong)
I am sorry that my question was too verbose, the point was I get the alignment fault from my user space application which mmap the reserved memory in device tree. The reserved memory is actually in DRAM, so I don't understand why I need to do the aligned access for it. I found some information from ARM reference manual here :https://developer.arm.com/documentation/ka004708/latest/https://developer.arm.com/documentation/102376/0100/Alignment-and-endianness.I don't know how I can check MAIR registers from user space, but I think this looks to my case. So I was curious how I can set it to "the normal memory region" rather than "device region". This might be ARM architecture specific, so I thought this community is suitable to ask a question. If I am right, your suggestion is based on the kernel space. Could you please give me an advice on user space?Thanks for your answer!