I’ve followed the bare metal guide at https://git.morello-project.org/morello/docs/-/blob/morello/release-1.3/standalone-baremetal-readme.rst to run the example ‘helloworld’ as a TFA payload on the FVP and hardware and all works fine. I also replaced the ‘helloworld’ program with a branch to self loop and successfully downloaded a helloworld EL2 program from the Development Studio on FVP and Hardware.
I then wanted to rebuild for purcap. I built the loop program using
Bin/clang -target aarch64-none-elf -march=morello+c64 -mabi-purecap -c loop.c -o loop.o 03
And built the fip.bin and bl1.bin binaries for FVP as before but with the ENABLE_MORELLO_CAP=1 option.
However after running the FVP and connecting to Development Studio with a connect only connection, it appears the PSTATE.C64 is set to a64 (instead of c64). For capability mode this would need to be in c64 mode on entry to EL2. I checked SPSR_EL3 which sets the mode on the ERET, and this appears to be set to a64 mode.
Consequently if I try to download a purecap program from the debugger it eventually falls over.
Is someone able to advise if I need to do anything else, or if it is a problem with the build scripts?
I can now partly answer my own question. The trusted firmware-A is not built with/support capabilities and therefore on EL2 entry the system is still in a64 mode because nothing has set up the system to use capabilities.
To switch to c64 mode you need to write some initialisation code for EL2. For bare metal development at EL3 with Development Studio, the LLVM bare metal binaries use crt0.S (_start) function to do the default set up for you. It sets up the registers, stack etc and puts the system into c64 mode (if this was selected as a build option). If you need anything different to this you need to write your own initialisation.
An equivalent initialisation is needed for EL2. It can't be the same initialisation code that is used by the EL3 bare metal because you can not modify the EL3 registers from EL2 (which are set up as part of the EL3 initialisation).
I don't think there is an equivalent EL2 version of crt0.S available? so presumably you would have to write your own.
It looks like the ENABLE_MORELLO_CAP=1 option sets CPTR_EL3.EC bit so that the morello instructions are not trapped.
We don't have an EL2 version of that but should be fairly straight-forward to modify (change EL3 to EL2)? I believe you additionally need an update to the page table setup bits (https://git.morello-project.org/morello/newlib/-/blob/morello/release-1.3/libgloss/aarch64/cpu-init/rdimon-aem-el3.S if you're using 1.3)
Many thanks. For other people needing to do this I needed crt.0, rdimon-aem-el3.S, and svc.h. I also needed to create a stub for _init and _fini, and include a linker flag -nostartfiles to stop the default _start from being used from within Development Studio. Once working for EL3 I could then modify for EL2. Thanks.