UART driver with GPIO hardware flow control

I briefly searched through our CMSIS UART drivers, but I could not find a driver that implements hardware flow control via GPIO pins which you could use as a template. So you will have to implement this by yourself.

I would implement two FIFO buffers for sending and receiving bytes in software and the transmission and reception of bytes via UART interrupt. When bytes are put in and out of the FIFO, the hardware flow control pins could be set according to the fill status of the FIFOs.

The LPC18xx UART driver only supports hardware flow control with dedicated UART pins. Our driver initializes the MCR register according to the specified CMSIS driver initialization parameters. The FIFOs are handled by the UART hardware.

I briefly searched through our CMSIS UART drivers, but I could not find a driver that implements hardware flow control via GPIO pins which you could use as a template. So you will have to implement this by yourself.

I would implement two FIFO buffers for sending and receiving bytes in software and the transmission and reception of bytes via UART interrupt. When bytes are put in and out of the FIFO, the hardware flow control pins could be set according to the fill status of the FIFOs.

The LPC18xx UART driver only supports hardware flow control with dedicated UART pins. Our driver initializes the MCR register according to the specified CMSIS driver initialization parameters. The FIFOs are handled by the UART hardware.