FaultISR infinite loop

I configured a simple project for the LM4F120H5QR in uVision 5.29, and got the same behavior (execution stops in FaultISR). In the startup.s file, there's a conditional test, shown below. The target defines CPU to be Cortex-M4.fp.sp, which doesn't match the test, so those few lines aren't assembled into the output file.

        IMPORT  __main

        IF      {CPU} = "Cortex-M4.fp"
        LDR     R0, =0xE000ED88           ; Enable CP10,CP11
        LDR     R1,[R0]
        ORR     R1,R1,#(0xF << 20)
        STR     R1,[R0]
        ENDIF

        B       __main

Changing the test to use Cortex-M4.fp.sp (to match the compiler command line argument) got a "working" simulation. Working in the sense that it didn't hit FaultISR. Maybe the difference between older/newer version of Keil is in the startup.s file? 

I configured a simple project for the LM4F120H5QR in uVision 5.29, and got the same behavior (execution stops in FaultISR). In the startup.s file, there's a conditional test, shown below. The target defines CPU to be Cortex-M4.fp.sp, which doesn't match the test, so those few lines aren't assembled into the output file.

        IMPORT  __main

        IF      {CPU} = "Cortex-M4.fp"
        LDR     R0, =0xE000ED88           ; Enable CP10,CP11
        LDR     R1,[R0]
        ORR     R1,R1,#(0xF << 20)
        STR     R1,[R0]
        ENDIF

        B       __main

Changing the test to use Cortex-M4.fp.sp (to match the compiler command line argument) got a "working" simulation. Working in the sense that it didn't hit FaultISR. Maybe the difference between older/newer version of Keil is in the startup.s file? 

Sounds a lot more likely than a compatibility issue with Windows 7!

Yeah, that would make sense. For what it's worth those lines enable the Floating Point Extension. If those lines are skipped over, executing any Floating point instruction in the code, will result in a fault. A walk through of the error itself and how to find the instruction which caused the fault in general can be found here

Hi adam  I am aslo facing same issue i tried changing the cpu to cortex-m4.fp.sp still issue exsist.do you have any other solution?

nisharamanak - Did you look at the links chrisc11 provided a year ago?

Also the links I provided back then.

Here's some more links on debugging Hard Faults:

https://community.arm.com/developer/ip-products/system/f/embedded-forum/3257/debugging-a-cortex-m0-hard-fault

nisharamanak Are you using compiler 5 (ARMCC) or compiler 6 (ARMCLANG)? Each compiler defines the CPU type differently, and neither is compatible with the original startup.s file.

If after compiler-specific modifications to startup.s you are getting hard faults, then use one of the links provided elsewhere in this thread to find the source and fix it.

nisharamanak hey, Keil doesn't state the memory of the TIVA-C µController Right;

after you select your µController




Keil automatic sets the RAM definition Like this :



When you go to the datasheet, you'll find that this is wrong,



So go back and change those memory address





Finally, don't forget to check the memory layout box in the Linker tab, otherwise, your memory definition is not considered.





This is how the error solved for me.

Hi I am using compiler 5 I have not made any update in startup file ,my initial target is to just run a counter program and observe the registers

HI Am_eng , I tried this but still there is a faultisr

Hi andi , I will check these debugging links

Is your runtime environment configuration is the same as this?

yes it is same only startup version is 1.0.0

Ok, My final advice is to try "Keil_MDK521a", for a reason I don't know why, old versions work well with that board.


Good luck

Thank you ill try with this version