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Inline Assembler 64 bit addition?

nice day

I was at first very happy to see that with ARMCC 5 now inline assembler works with the thumb mode of Cortex M4.

Just I fail to program an efficient inline assembler routine for 64 bit addition (later I want to do overflow checking, therefore I need inline assembly).

If I use the following function in C++:

__forceinline int satAdd( int a, int b){
  int c;
  __asm{
    ADDS c, a, b
  }
  return c;
}


This generates very nice and compact code (just one assembly line, as expected).

But I have no glue how to do this with 64 bit.

In GNU CC inline assembler, this would be very easy:

  ADDS %2, %1, %0
  ADCS %d2, %d1, %d0

I am frightened there is no possibility to access the upper register of a "64 bit register double" in Keil C++? (like "%d2"?)

(Even accessing the lower register of the "register doubles" seems to be impossible, as the Keil inline assembler seems to do type checking for the variables in the assembly part - so not possible to just use the "64 bit variable" in a ADDS command).

Further the inline assembler crashes, if I try to check the overflow flag with BVS / BVC (BEQ/ BNE/ BCS/ BCC /BMI / BPL all work ...).

SOS - I hope somebody can help here?

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