Any Idea about setting RCC regs!!

Hi,
After setting of the RCC registers like those in many examples in the web I found, I see that a toggling led does not match with the frequency of STM32f103RE. I have set the PLLmul to 9 and HSE devide value is 1. I used the code below to verify 72Mhz:

         GPIOB->ODR|=0x8000;
         for(j=0;j<72000;j++){ for(i=0;i<1000;i++);       }
         GPIOB->ODR&=0x7FFF;
         for(j=0;j<72000;j++){ for(i=0;i<1000;i++); }

the led period is about 9 sec.

RCC config is as follows:

void RCC_Configuration(void)
{
  /*set RCC registers to default values RCC system reset*/
  RCC_DeInit();

  /*Enable HSE */
  RCC_HSEConfig(RCC_HSE_ON);

  /*Wait till HSE is ready */
  HSEStartUpStatus = RCC_WaitForHSEStartUp();

  if(HSEStartUpStatus == SUCCESS)     // SUCCESS
  {
  /*AHB= SYSCLK= 48 MHz, HCLK(AHB clock) = SYSCLK */
    RCC_HCLKConfig(RCC_SYSCLK_Div1);

  /*PCLK2(APB2 clock)= AHB clock/2 = 24 MHz,PCLK2 = HCLK/2 */
    RCC_PCLK2Config(RCC_HCLK_Div2);
 /*PCLK1(APB1 clock)= AHB clock/4=12 MHz, PCLK1 = HCLK/4 */
    RCC_PCLK1Config(RCC_HCLK_Div4);  //RCC_HCLK_Div4: APB1 clock = HCLK/4=12MHz
    /* set Flash delay clocks to 2 */
    FLASH_SetLatency(FLASH_Latency_2);

    /* Enable Flash Prefetch Buffer*/
    FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);

  /* PLLCLK = 8MHz * 9 = 72 MHz */
    RCC_PLLConfig ( RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);

    /* Enable PLL */
    RCC_PLLCmd(ENABLE);
     /* Wait till PLL is ready*/
    while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
    {
    }

    /* Select PLL as system clock source */    //Select PLLCLK as SYSCLK
   RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
    /*Wait till PLL is used as system clock source */
    while(RCC_GetSYSCLKSource() != 0x08)
    {
    }
  }

/* Enable peripheral clocks --------------------------------------------------*/
  /* GPIOA, GPIOB and SPI1 clock enable */
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA |        RCC_APB2Periph_GPIOB |     RCC_APB2Periph_SPI1, ENABLE);

  /* Enable GPIOC, GPIOD clock */
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC| RCC_APB2Periph_GPIOD, ENABLE);
}