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The Uart baud rate generation formula is,
UARTn baudrate = PCLK/16*UnDL
UnDL = 256 × UnDLM + UnDLL
why the Divisor latch MSB is multiplied with 256
plz inform me,
thank you
Because 256 is 2 to the power of 8. And it is 1 more than 255.
Didn't you think the datasheet/user manual for the processor contained enough information to answer this question?
If you don't think so, then you have to contact the chip manufacturer, because the people who read your post on this forum doesn't have access to any more documentation than what you can retrieve yourself.
...than what you can retrieve yourself.
In fact, people on this forum don't even have access to that - because you didn't bother to mention what specific chip you are talking about!!
What is the reason for multiplying the UnDLM with 256?
At higher baud rates the MSB register will taken the value 0,than why did the 256 is multiplied with msb?
Didn't you realize how obvious the answer is? You know about binary numbers?