Baud rate HELP............

... and doesn't the chip manufacturer provide any examples?

Maybe Keil provide some examples - have you checked...?

... and doesn't the chip manufacturer provide any examples?

Maybe Keil provide some examples - have you checked...?

Download the access baudrate calculator from the NXP site!

I have checked user manual and using sample codes given by ARM.

The following is my code , give me any suggestions ....

/***************************************************************************************/


#include "LPC11xx.h"

#define IER_RBR         0x01
#define IER_THRE        0x02
#define IER_RLS         0x04

#define LSR_RDR         0x01
#define LSR_THRE        0x20

void UARTInit(unsigned int Baudrate);
void UARTSend(void);
void UARTRecv(void);
void delay(void);

volatile unsigned char  RECV;


int main (void)
{

        UARTInit(9600);

        while (1)
        {
        UARTRecv();
        UARTSend();
        }
}

/*=========================================================================================*/
void UARTInit(unsigned int baudrate)
{
                unsigned int regVal;
                unsigned int Fdiv;

                LPC_IOCON->PIO1_6 &= ~0x07;                      /*  UART I/O config */
                LPC_IOCON->PIO1_6 |= 0x01;                           /* UART RXD */
                LPC_IOCON->PIO1_7 &= ~0x07;
                LPC_IOCON->PIO1_7 |= 0x01;                           /* UART TXD */

                LPC_SYSCON->SYSPLLCTRL = (1<<3)|(1<<6);
                LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);  // UART CLK enable
                LPC_SYSCON->UARTCLKDIV = 0x2;                /* divided by 1 */

                LPC_UART->LCR = 0x83;                /* DLB=1, 8 bits, no Parity, 1 Stop bit */
                regVal = LPC_SYSCON->UARTCLKDIV;

                Fdiv = (((12000000/1)/regVal)/16)/baudrate ;    /*baud rate */
                LPC_UART->DLM = Fdiv/256;
                LPC_UART->DLL = Fdiv % 256;
                LPC_UART->LCR = 0x03;        /* DLAB = 0 ,Disable access to divisor latches*/
                LPC_UART->FCR = 0x07;        /* Enable and reset TX and RX FIFO. */

                regVal = LPC_UART->LSR;      /* Read to clear the line status. */

                return;
}


void UARTSend()
{
        lcd_str("in snd");
        delay();
        LPC_UART->THR = RECV;        // for my testing i'm sending recd cahr+1 value
        while ( !(LPC_UART->LSR & 0x40) ); //wait until TEMT=0,i.e. U0THR contains valid data

}

void UARTRecv()
{
        lcd_str("in recv");
        while(!(LPC_UART->LSR & (0x01)));
        RECV=LPC_UART->RBR;          //Store the char received in to a variable
}


/****************************************************************************************/

with this code , I am getting simulation output. In simulation I'm getting baud rate other than 9600.

I am using Xtal freq: 12Mhz

Please help me......

So what baud rate, exactly, are you getting? How do you determine that?

What investigations have you done to try to account for the difference?

Is this correct:

 LPC_SYSCON->UARTCLKDIV = 0x2;                /* divided by 1 */

LPC_UART->LCR = 0x83;                /* DLB=1, 8 bits, no Parity, 1 Stop bit */
regVal = LPC_SYSCON->UARTCLKDIV;

Fdiv = (((12000000/1)/regVal)/16)/baudrate ;    /*baud rate */

if LPC_SYSCON->UARTCLKDIV = 0x2 means a division by 1, are you then sure that Fdiv = (((12000000/1)/regVal)/16)/baudrate ; will not compute a factor two wrong, since regVal will contain the value 2 and not the value 1.

I think you can be right.

Update the tested code and post it back.

Hi,

Now I have tried with division value '1', I'm getting 9615 baud rate...

Is this 9615 baud rate is enough for serial communication of 9600?

It's almost perfect. An error of 0.15%.

Most microcontrollers can't get perfect baudrates, but asynchronous communication is designed to support small speed errors.

The requirements to get perfect baudrates are to either have an original clock frequency that divides perfectly, or to have a microcontroller with baudrate correction logic where UART can work with a fractional divisor - it inserts an extra clock cycle now and then to correct for creep caused by the integer division in the "normal" baudrate calculation.