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Porting FlashFS to use NANDFlash

Stefan Hartwig

Hi,
I adopted FlashFS to use my NANDFlash (9F2G08U0A).
finit() and fformat ("F:") are working fine and the flash gets erased.
But if I call fopen, to create files, I get linker error:

.\at91sam9260-sdram\at91sam9260-sdram.axf: Error: L6915E: Library reports error: __use_no_semihosting_swi was requested, but _sys_open was referenced


I got a retarget.c which implements _sys_open and many other _sys-functions:

FILEHANDLE _sys_open (const char *name, int openmode) {
   /* Register standard Input Output devices. */
   if (strcmp(name, "STDIN") == 0) {
      return (STDIN);
   }
   if (strcmp(name, "STDOUT") == 0) {
      return (STDOUT);
   }
   if (strcmp(name, "STDERR") == 0) {
      return (STDERR);
   }
   return (__fopen (name, openmode));
}

How can I compile my code without errors?

Parents
  • 0 in reply to Stefan Hartwig

    Thanks for your reply. I understand this of course. I just wanted to see if the erase sector function is called - which is not the case (returning 0 from any of these functions is considered as success). So, 'fformat("F:");" with the settings above if sufficient and should work?
    I think I am going to try to convince the head of R&D to replace that flash chip. I mean, I have seen that FlashFS calls a function that is likely to attempt to configure the SPI bus when using these settings. I am worried about the side effects on our SPI chips and general maintainability.

Reply
  • 0 in reply to Stefan Hartwig

    Thanks for your reply. I understand this of course. I just wanted to see if the erase sector function is called - which is not the case (returning 0 from any of these functions is considered as success). So, 'fformat("F:");" with the settings above if sufficient and should work?
    I think I am going to try to convince the head of R&D to replace that flash chip. I mean, I have seen that FlashFS calls a function that is likely to attempt to configure the SPI bus when using these settings. I am worried about the side effects on our SPI chips and general maintainability.

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