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STM32 timer does not work like expected

Norbert Seng

Hello,

It's my first project with STM32 and ST firmware library.
I have a problem with my timer configuration. I want a cyclic timer 2 interrupt all 100 us (10 kHz). So I configured the timer:

  TIM_TimeBaseStructInit( &TIM_TimeBaseStructure );
  TIM_TimeBaseStructure.TIM_Period = 100;
  TIM_TimeBaseStructure.TIM_Prescaler = 35;
  TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
  TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
  TIM_TimeBaseInit( TIM2, &TIM_TimeBaseStructure );
  TIM_ITConfig( TIM2, TIM_IT_Update, ENABLE );
  TIM_Cmd( TIM2, ENABLE );


Notes:
TIM2CLK is 36 MHz.
Prescaler = 35 ==> TIM2 counter clock = 1 MHz
- because TIM2 counter clock = TIM2CLK / (Prescaler +1)
Auto reload preload value: 1 MHz / 10 kHz = 100

So I expected an timer 2 interrupt all 100 ms. But when my program runs at my ST STM3210B evaluation board or in the simulator, the interrupt comes all 50 us (20 kHz).

What is wrong? - Any idea?

Thanks in advance,
Norbert

  • 0

    looks like a configuration in your system is wrong. Can it be that the TIM2CLK is actually 72MHz?

  • 0 in reply to Keil Software Support Intl.

    It seems to be my problem. I thought the Timer runs with APB1 Clock (PCLK1). But when I look on the clock tree figure in the STM32 reference manual, there is a multiplier what doubles the APB1 clock for the timers if the APB1 prescaler is unequal 1.

    My RCC configuration was:

        RCC_PCLK1Config (RCC_HCLK_Div2);    /* Clock APB1                   */


    So the APB1 clock = HCLK/2, but the TIM2CLK is APB1 clock * 2, isn't it?

  • 0 in reply to Norbert Seng

    I had this exact same problem. Thanks for pointing out the figure in the manual.

    I have my APB1 frequency set for 36Mhz. My HCLK is set to 72Mhz which means the APB1 prescaler is set to 2.

    APB1 clock was used to calculate timer frequency but for some reason calculations came up as double my wanted frequency.

    I now into account that the Timer clock is double the APB1 clock frequency when the ABP1 prescaler is set to anything but one. My timer frequencies are now correct.

  • 0 in reply to Neil Radnitz

    Hello,

    the clock generation for the timers are well documented in the STM32 reference manual chapter Clocks in Reset and clock control (RCC):

    The timer clock frequencies are automatically fixed by hardware. There are two cases:
    1. if the APB prescaler is 1, the timer clock frequencies are set to the same frequency as
    that of the APB domain to which the timers are connected.
    2. otherwise, they are set to twice (*2) the frequency of the APB domain to which the
    timers are connected.

    Best Regards,
    Martin Guenther

  • 0 in reply to Martin Günther

    Thank you for your note. I didn't notice this paragraph before. Now the timer's behavior is understandable.

    Thanks,
    Norbert