Hi, i use a AT91SAM9263 and i will boot it from nor-flash. At boot time i must switch the master clock at a higher frequency. This switch can’t be performed from NOR flash, as the access timings to the chip are different with the two clocks.
The solution in ATMEL Bootstrap v1.9 (crt0_gnu.s) is:
... undef_vector: b undef_vector swi_vector: b swi_vector pabt_vector: b pabt_vector dabt_vector: b dabt_vector rsvd_vector: b rsvd_vector irq_vector: b irq_vector fiq_vector: b fiq_vector reset_vector: /* Init the stack */ _init_stack: ldr sp,=TOP_OF_MEM #ifdef CFG_NORFLASH /* * When running from NOR, we must relocate to SRAM prior to resetting * the clocks and SMC timings. */ _relocate_to_sram: #if 0 /* relocation is slow, disable the watchdog or it will trigger */ ldr r1, =0xFFFFFD44 mov r2, #0x00008000 str r2, [r1] #endif mov r1, #0 ldr r3, =_stext ldr r4, =_edata 1: cmp r3, r4 ldrcc r2, [r1], #4 strcc r2, [r3], #4 bcc 1b ldr pc, =_setup_clocks #endif /* CFG_NORFLASH */ _setup_clocks: /* Test if main oscillator is enabled */ ldr r0,=AT91C_PMC_SR ldr r1, [r0] ldr r2,=AT91C_PMC_MOSCS ands r1, r1, r2 bne _switch_to_mosc ....
The important part is:
mov r1, #0 ldr r3, =_stext ldr r4, =_edata 1: cmp r3, r4 ldrcc r2, [r1], #4 strcc r2, [r3], #4 bcc 1b ldr pc, =_setup_clocks
I convert this in my startup-file:
.... ; Reset Handler EXPORT Reset_Handler Reset_Handler ;/* ; * When running from NOR, we must relocate to SRAM prior to resetting ; * the clocks and SMC timings. ; */ mov r1, #0 ldr r3, =0x00300000 ;SRAM ldr r4, =||Image$$ER_IROM1$$RO$$Length||+||Image$$RW_IRAM1$$RW$$Length|| copy ldrcc r2, [r1, #4]! ; R2 = Wert von Adresse R1+4, R1 wird um 4 erhöht strcc r2, [r3, #4]! ; speichere R3+Offset in R2 cmp r3, r4 bne copy ldr pc, =_init_pmc ; Setup Power Management Controller (PMC) -------------------------------------- _init_pmc IF :DEF:NO_PMC_INIT ELSE IF PMC_SETUP != 0 ....
but these don't work!