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Hello
I am facing a problem in the following code.
code :-
#include "LPC318x.h" void IRQ_HANDLER(void) __irq { PIO_OUTP_SET = 0x7EFFFFFF; PIO_OUTP_SET = 0x7EFFFFFF; }
int main (void) { unsigned int i=0; SYSCLK_CTRL = 0x00000140; HCLKPLL_CTRL = 0x00014024; UARTCLK_CTRL = 0x0F; MIC_ER = 0x000007C0; U5LCR = 0x03; U5CLK = 0x0000020E; UART_CLKMODE = 0x00000550; U5FCR = 0x00; U5IER = 0x07; U3DLL = 27;
while(1) {
U5THR = 0x55; U5THR = 0xAA; }
}
When i enable UART5 interrupt by using MIC_ER interrupt is generated as it should be. But after transmitting the data it jumps to an unusual location 0x000002d4. But it doesnt go to IRQ handler. If i don't enable the interrupt using MIC_ER then it executes only while(1) loop. The main aim of the program is to blink the LED after send data through UART5 as mentioned in the IRQ interrupt handler.
Thank You,
Ankit Thakkar.
Yes.. You are right.. i mentioned __irq keyword now. But it doesn't jump at the location of handler shown in the map file. But I am not clear with prologue/epilogue code. Can you please tell me what is that? I presume it to be something like that by using it the processor decides where to jump when the interrupt is generated.
Google is your friend:
en.wikipedia.org/.../Function_prologue
And have you seen if you can single-step all the way from the interrupt vector table?
yeah.. i got abt prologue and epilogue. i checked in a single step execution. Eventhough after the generation of interrupt it doesn't jump anywhere in the program and just executes the instructions in the normal sequence. So i can not jump to any interrupt handler while executing instructions in single step mode. When i run the code by pressing f5 it handles the interrupt and the processor goes into IRQ mode. The location it jumps is 0x000001BC. the location mentioned for IRQ routine is 0x800001A0 which is the address of OFFCHIP SRAM. As i believe the IRQ routine is placed from OFFCHIP SRAM to onchip SRAM for faster execution. I dont have any clue where IRQ is stored in onchip SRAM.
Did you test what happens if you set a breakpoint in the startup file?
yeah i placed break points on the vector table points as shown below.
Vectors LDR PC,Reset_Addr LDR PC,Undef_Addr LDR PC,SWI_Addr LDR PC,PAbt_Addr LDR PC,DAbt_Addr ;DCD ||Image$$ER_IROM1$$RO$$Length||+||Image$$RW_IRAM1$$RW$$Length|| DCD 0x4000 ;PHYTEC comment: This hard codes the size ;that the secondary bootloader uses to copy ;binary software to SDRAM.
LDR PC,IRQ_Addr LDR PC,FIQ_Addr
Reset_Addr DCD Reset_Handler Undef_Addr DCD Undef_Handler SWI_Addr DCD SWI_Handler PAbt_Addr DCD PAbt_Handler DAbt_Addr DCD DAbt_Handler DCD 0 ; Reserved Address IRQ_Addr DCD IRQ_Handler FIQ_Addr DCD FIQ_Handler
Undef_Handler B Undef_Handler SWI_Handler B SWI_Handler PAbt_Handler B PAbt_Handler DAbt_Handler B DAbt_Handler IRQ_Handler B IRQ_Handler FIQ_Handler B FIQ_Handler
When IRQ is generated and i press F5 it should go to interrupt vector table but PROGRAM counter doesn't go there.
You still haven't read the instructions for posting code, which makes any code you post look completely garbled...
Note that the vector table in itself is an array of addresses which may make it impossible to take an interrupt there. You are probably limited to putting breakpoints on the first instruction pointed at by the vector table entries.
sorry for bad code posting. you are right that interrupt vector itself is an array of addresses but when it enters into IRQ mode it loads program counter by the starting address of IRQ routine. which is LDR instruction. I have placed breakpoints on that instructions. So when it enters into IRQ mode it should load PC by IRQ routine starting address. But it doesn't execute the instruction. again i m posting the code where i placed the breakpoints in startup file
Vectors LDR PC,Reset_Addr LDR PC,Undef_Addr LDR PC,SWI_Addr LDR PC,PAbt_Addr LDR PC,DAbt_Addr ;DCD ||Image$$ER_IROM1$$RO$$Length||+||Image$$RW_IRAM1$$RW$$Length|| DCD 0x4000 ;PHYTEC comment: This hard codes the size ;that the secondary bootloader uses to copy ;binary software to SDRAM. LDR PC,IRQ_Addr LDR PC,FIQ_Addr
And i placed breakpoints when CPSR is changed when it enters into IRQ mode and loads SP.
Enter IRQ Mode and set its Stack Pointer MSR CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit MOV SP, R0 SUB R0, R0, #IRQ_Stack_Size
i have placed breakpoints on all the points as shown in the code. but PC doesn't even enter in that code.
Does the address after LDR match the address of your IRQ handler as seen from the map file?
Have you tried to add breakpoints for all the other vectors?
HEY when i place more than two break points in the program and try to run it. it executes code upto first break point but then the execution stops there. it doesnt go ahead by pressing F5. Even it doesnt go ahead if i press F10 or F11. Thats strange. When i debug step by step using F11 it doesnt execute using F5. I am doing onchip debugging and ETB module of LPC3180 supports upto two breakpoints at a time only. So i dont reach on the exact address location where IRQ starting address is located.
Much can be done with only two breakpoints.
You may have to run the application multiple times, trying different locations for your breakpoints.
hey i checked that whether my interrupt is routine is called from interrupt handler or not. Its working. Interrupt handler defined in start up file calls function which i have defined in the source code. I checked it by manually executing instruction at interrupt handler in startup file. Now problem remains that when IRQ is generated does Program counter goes to interrupt handler defined in the start up file or not. I am trying for this.
I run code from external SDRAM. when IRQ is generated program counter jumps to some location in IRAM. i dont know how data is moved from external SDRAM to IRAM. So i cant come to know where my interrupt vector table is stored in IRAM.
it is exceedingly difficult to understand what's wrong without a clear understanding of HOW your system is organized. how does it boot? what is the logic behind the bootcode? memory available? without minimal topology details - I doubt whether anybody would be in a position to help. give more details in concise, technical language.
yeah sure.
My code is in external SDRAM which starts from 0x80000000. In the starting of my code interrupt vector table is located then all functions are stored. In my code i defined an IRQ handler function. Which should be called when IRQ is generated. But When IRQ is generated it goes into onchip IRAM (0x00000000 to 0x00004000) instead of going into IRQ handler function. I have verified that if program counter goes into interrupt vector table it calls the desired function. So the problem is that when IRQ is generated why program counter doesnt enter into interrupt vector table.
in case of an IRQ, the processor is supposed to go to 0x18 - which must contain the instruction to just to your function. is that the case?
in meant, of course , "jump to your function"