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C166 vs. ARM7 interrupt clearing

Hello,
I have been reading the details concerning interrupt handling in the ARM core. I see how nested/not nested interrupts work, and that it is important to clear the interrupt in the handler to prevent an infinite loop. I see the assembly instruction for that, too. But why don't I see something similar when I compile the code for a C166? What did I miss?

Thanks in advane,
Cactus Blip

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  • What did I miss?

    How one particular interrupt controller works is described in its documentation (different ARM7 chips may even have different interrupt controllers). Using one interrupt controllers documentation to make guesses about how a different controller works is fairly pointless.

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  • What did I miss?

    How one particular interrupt controller works is described in its documentation (different ARM7 chips may even have different interrupt controllers). Using one interrupt controllers documentation to make guesses about how a different controller works is fairly pointless.

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