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I am using MCBSTR9 evaluation boards for testing the ethernet throughput (sending 1316 bytes length UDP packets).
I have implemented my code using the Keil HTTP demo with RTX_Kernel and running the board at 96MHz.
The maximum speed I got is (aprox) 40Mbit/s but I have two questions:
1. Is it possible to set FMICLK = RCLK = 96Mhz (now is RCLK/2) ?? (PLL config (2,192,25), Or there is any kind of speed limitation??
2. Is there any other TCP/IP stack optimized for this board to get a higher throughput??
thanks,
Firin
Thank you very much Franc.
I have changed all these settings and the performance is much better, specially enabling the pre-fetch QBC unit.
Regards,