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Why my slave FIFO still empty? (using FX2 CY7C68013 128-pin)

Hi,
&nbsp&nbsp My object is to attach an external logic(ccd sensor MT9P001 with 24MHz clock in and 24MHz out) to the FX2 slave FIFO, so that host can read from FIFO data. However, the current problem is that the FIFO is still empty because I cannot read any data using EZ-USB Control Panel.

&nbsp&nbsp The hardware configuration is set as follows:
1. Slave FIFO, set EP6 IN, bulk mode, 512*4 buffering
2. external clock provided by the sensor
3. AutoIn Mode
4. SLWR always low so that the sensor can wirte to FIFO decided by its clock

The hardware pins is wired as follows:

PORTB (fifo data) read from external logic data
SLOE        VCC
SLRD        VCC
SLWR        GND
PKTEND      VCC
FIFOADR0    GND
FIFOADR1    VCC  //write to EP6
IFCLK       read from external logic clock

&nbsp&nbsp Besides, I modify TD_Init() in the sample code srcout_s.c, which is provided by Cypress "FX2 Slave FIFO Source OUT" with EP2 OUT and EP6 IN.

&nbsp&nbsp Here is the TD_Init() which I modify
void TD_Init( void )
{ // Called once at startup

  CPUCS = 0x10;                 // CLKSPD[1:0]=10, for 48MHz operation
                                // CLKOE=0, don't drive CLKOUT
  IFCONFIG = 0x03;
  // IFCLKSRC=0   , FIFOs executes on external clk source
  // xMHz=x       , don't care
  // IFCLKOE=0    , Don't drive IFCLK pin signal at 48MHz
  // IFCLKPOL=0   , Don't invert IFCLK pin signal from internal clk
  // ASYNC=0      , master samples synchronous
  // GSTATE=0     , Don't drive GPIF states out on PORTE[2:0], debug WF
  // IFCFG[1:0]=11, FX2 in slave FIFO mode

  SYNCDELAY;                    // see TRM section 15.14
  REVCTL = 0x01;                // use enhanced packet handling

  // EP2 512 BULK OUT 4x
  SYNCDELAY;                    //
  EP2CFG = 0xA0;                // BUF[1:0]=00 for 4x buffering

  // EP6 512 BULK IN 4x
  SYNCDELAY;                    //
  EP6CFG = 0xE0;                // BUF[1:0]=00 for 4x buffering

  // EP4 and EP8 are not used in this implementation...
  SYNCDELAY;                    //
  EP4CFG = 0x20;                // clear valid bit
  SYNCDELAY;                    //
  EP8CFG = 0x60;                // clear valid bit
  // 8-bit bus (WORDWIDE=0)...
  SYNCDELAY;                    //
  FIFORESET = 0x80;             // activate NAK-ALL to avoid race conditions
  SYNCDELAY;                    //
  FIFORESET = 0x02;             // reset, FIFO 2
  SYNCDELAY;                    //
  FIFORESET = 0x04;             // reset, FIFO 4
  SYNCDELAY;                    //
  FIFORESET = 0x06;             // reset, FIFO 6
  SYNCDELAY;                    //
  FIFORESET = 0x08;             // reset, FIFO 8
  SYNCDELAY;                    //
  FIFORESET = 0x00;             // deactivate NAK-ALL

  // use auto in mode
  SYNCDELAY;                    //
  EP6FIFOCFG = 0x0C;            // AUTOIN=1, ZEROLENIN=1, WORDWIDE=0

}

&nbsp&nbsp I don't modify other function call except this one. When I download the compiled hex code to firmware, at least I can click GetPipes button and show correct pipes information. But when I click Bulk/Int button and choose EP6 IN 512 bytes, it get nothing.

Is there anything else I don't take care of? If someone has experienced it , please tell me.
Thank you for reading the long message.

Frank

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