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Reading from cortex debug + ETM

Hello,

I'm trying to configure a STM32F400 board so that I can read from the Cortex Debug + ETM using the gpio pins. Is this possible? The pins are so small that it would be difficult if not impossible to read from those pins when the J-Trace is plugged in. Please let me know if you know of any resources that can help me accomplish this.

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  • Not tinkered with this in recent years, but the trace data is a fire-hose data source, so you need some means/method to capture it, and then to process it.

    This isn't an olden days ICE type trace, but rather a reconstructive process where you're holding copies of the on board memories, and replicating transactions into a state model of the processor core.

    I'd probably go with the pass-thru interposer method, and buffer into an FPGA or FIFO memory.

    Perhaps find a different F4 board which you can get to the SWDIO, SWCLK and TRACE pins more directly?

    Or a board exposing the pins?
    www.segger.com/.../cortex-m-trace-reference-board-v1_2-3d-1000x.png

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  • Not tinkered with this in recent years, but the trace data is a fire-hose data source, so you need some means/method to capture it, and then to process it.

    This isn't an olden days ICE type trace, but rather a reconstructive process where you're holding copies of the on board memories, and replicating transactions into a state model of the processor core.

    I'd probably go with the pass-thru interposer method, and buffer into an FPGA or FIFO memory.

    Perhaps find a different F4 board which you can get to the SWDIO, SWCLK and TRACE pins more directly?

    Or a board exposing the pins?
    www.segger.com/.../cortex-m-trace-reference-board-v1_2-3d-1000x.png

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