Hi
I have connected LPC2148 with 12Mhz Crystal, 15 Mhz PCLK to ENC28J60 with the following PIN Connections.
ARM ENC28J60 PO.4 >>>>> SCK PO.6 >>>>> SI PO.5 >>>>> SO PO.7 >>>>> CS
RESET PIN of ENC28J60 is connected to hardware reset PIN of LPC2148. I have been able to run the compiled program in Proteus and was able to PING the configured IP. No problem at all.
When I run the same with real hardware... it doesnt work. I dont even get a PIN response. What could be the problem ? Should I do anything more with the hardware? Please advise.
Thank you.
ENC INIT
void enc28j60Init(uint8_t* macaddr) {
ENC28J60_CONTROL_DDR |= ((1<<ENC28J60_CONTROL_CS)); IO1DIR = 0x01000000;
CSPASSIVE; // ss=0
IO1CLR = 0x01000000; delay_ms(200); IO1SET = 0x01000000;
PINSEL0 |= 0x1500; S0SPCCR = 0x0e; //0a 6.6m 0c 5.5m 0e 4.7m // org 0e S0SPCR = 0x20;
delay_ms(400);
enc28j60WriteOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
delay_ms(50);
NextPacketPtr = RXSTART_INIT;
// Rx start enc28j60Write(ERXSTL, RXSTART_INIT&0xFF);
enc28j60Write(ERXSTH, RXSTART_INIT>>8);
// set receive pointer address enc28j60Write(ERXRDPTL, RXSTART_INIT&0xFF);
enc28j60Write(ERXRDPTH, RXSTART_INIT>>8);
// RX end enc28j60Write(ERXNDL, RXSTOP_INIT&0xFF);
enc28j60Write(ERXNDH, RXSTOP_INIT>>8);
// TX start enc28j60Write(ETXSTL, TXSTART_INIT&0xFF);
enc28j60Write(ETXSTH, TXSTART_INIT>>8);
// TX end enc28j60Write(ETXNDL, TXSTOP_INIT&0xFF);
enc28j60Write(ETXNDH, TXSTOP_INIT>>8);
enc28j60Write(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN);
enc28j60Write(EPMM0, 0x3f);
enc28j60Write(EPMM1, 0x30);
enc28j60Write(EPMCSL, 0xf9);
enc28j60Write(EPMCSH, 0xf7);
enc28j60Write(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS);
// bring MAC out of reset enc28j60Write(MACON2, 0x00);
// enable automatic padding to 60bytes and CRC operations enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN);
// set inter-frame gap (non-back-to-back) enc28j60Write(MAIPGL, 0x12);
enc28j60Write(MAIPGH, 0x0C);
// set inter-frame gap (back-to-back) enc28j60Write(MABBIPG, 0x12);
// Set the maximum packet size which the controller will accept // Do not send packets longer than MAX_FRAMELEN: enc28j60Write(MAMXFLL, MAX_FRAMELEN&0xFF);
enc28j60Write(MAMXFLH, MAX_FRAMELEN>>8);
// do bank 3 stuff // write MAC address // NOTE: MAC address in ENC28J60 is byte-backward enc28j60Write(MAADR5, macaddr[0]);
enc28j60Write(MAADR4, macaddr[1]);
enc28j60Write(MAADR3, macaddr[2]);
enc28j60Write(MAADR2, macaddr[3]);
enc28j60Write(MAADR1, macaddr[4]);
enc28j60Write(MAADR0, macaddr[5]);
// no loopback of transmitted frames enc28j60PhyWrite(PHCON2, PHCON2_HDLDIS);
// switch to bank 0 enc28j60SetBank(ECON1);
// enable interrutps enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE);
// enable packet reception enc28j60WriteOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
}