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Hardcoded Breakpoint Preventing Program From Running

Stephen Goodman

There is an issue (it's not a bug because of reasons) where if you use armclang at -O0 optimisation with no parameters specified in the main function, the initialisation code contains a coded breakpoint. This will stop the code from running before main is reached.

There are multiple work arounds including:

1) Using MicroLib

2) Disabling semihosting manually:

__asm(".global __use_no_semihosting\n\t");


Note that the following funcitons will need to be retargeted:

extern "C" void _sys_exit(int ch) { }
extern "C" void _sys_command_string(int ch) { }
extern "C" void _ttywrch(int ch) { }

3) Use the following, which apparently is used automatically by armclang on higher optimisation levels:

__asm(".global __ARM_use_no_argv");

Apparently the coming fix "will be a better documentation about the symbol __ARM_use_no_argv and why it is needed when using -O0."

Just wanted to let people know in case it happens to them.

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  • 0

    Hello Stephen ,

    Thanks for posting this. It has good information. I didn't find it until just now.

    1) I thought I would add some additional links, for future forum users to reference.

    You can read more about using the Hardcoded Breakpoint issue in this article:

    http://www.keil.com/support/docs/3614.htm

    2) You mentioned compiling at optimization level 0 using ARM compiler 6 (ARMCLANG).

    For ARMCC compiler 5 the optimization 0 was the default. However, for ARMCLANG, optimization level 1 is the recommended optimization for ARM-based microcontroller projects.

    See http://www.keil.com/appnotes/docs/apnt_298.asp

    There is a temptation to thing level 2 optimization of ARCC works the same as level 2 for ARMCLANG, but there is not an apple-to-apples comparison.

    See: http://www.keil.com/support/docs/3996.htm

    For a bit more detail on what Stephen mentioned, look at the "Note" section at the bottom of this page:

    www.keil.com/.../armclang_mig_udb1499267612612.htm

    It explains more on why you should not use level 0 optimization, and what all is involved to compile at level 0 optimization using ARMClang on an ARM-based microcontroller .

Reply
  • 0

    Hello Stephen ,

    Thanks for posting this. It has good information. I didn't find it until just now.

    1) I thought I would add some additional links, for future forum users to reference.

    You can read more about using the Hardcoded Breakpoint issue in this article:

    http://www.keil.com/support/docs/3614.htm

    2) You mentioned compiling at optimization level 0 using ARM compiler 6 (ARMCLANG).

    For ARMCC compiler 5 the optimization 0 was the default. However, for ARMCLANG, optimization level 1 is the recommended optimization for ARM-based microcontroller projects.

    See http://www.keil.com/appnotes/docs/apnt_298.asp

    There is a temptation to thing level 2 optimization of ARCC works the same as level 2 for ARMCLANG, but there is not an apple-to-apples comparison.

    See: http://www.keil.com/support/docs/3996.htm

    For a bit more detail on what Stephen mentioned, look at the "Note" section at the bottom of this page:

    www.keil.com/.../armclang_mig_udb1499267612612.htm

    It explains more on why you should not use level 0 optimization, and what all is involved to compile at level 0 optimization using ARMClang on an ARM-based microcontroller .

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