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LwIP and compiler 6

Good moorning,

I am trying to use LwIP to do a RAW Socket TCP connection.
I have did it without problems but i used the compiler 5, i want add this development to another proyect that i am doing but in that i use the compiler 6.
When i try to migrate it, appears too many compile errors.

Do you know if there are any limitations?
Someone use LwIP with the compiler 6?

I am working with a ST microcontoller, the STM32F779NI.
The IDE that use is the KEIL MDK.

I hope you can help me.
Thank you very much for you time.

Parents
  • Good Moorning,

    I finaly resolved it.

    First i found the correct sintaxys for DMA reserve.

     // Ethernet Rx DMA Descriptors
       __attribute__((section(".ARM.__at_0x2007C000")))  \ 
       ETH_DMADescTypeDef  DMARxDscrTab[ETH_RXBUFNB];
    
     // Ethernet Rx DMA Descriptors
       __attribute__((section(".ARM.__at_0x2007c080")))  \ 
       ETH_DMADescTypeDef  DMATxDscrTab[ETH_TXBUFNB];
    
     // Ethernet Rx DMA Descriptors
       __attribute__((section(".ARM.__at_0x2007C100")))  \ 
       uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE];
    
     // Ethernet Rx DMA Descriptors
       __attribute__((section(".ARM.__at_0x2007D8D0")))  \ 
       uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE];
    

    Second i changed the memory map in sct file.
    I changed the size of IRAM1, for have a space reserved.

    RW_IRAM1 ADDRESS SIZE{ ;RW data
            .ANY(+RW +ZI)
    }
    
    ; *************************************************************
    ; *** Scatter-Loading Description File generated by uVision ***
    ; *************************************************************
    
    LR_IROM1 0x08000000 0x00200000  {    ; load region size_region
      ER_IROM1 0x08000000 0x00200000  {  ; load address = execution address
       *.o (RESET, +First)
       *(InRoot$$Sections)
       .ANY (+RO)
       .ANY (+XO)
      }
      RW_IRAM1 0x20020000 0x0005C000  {  ; RW data
       .ANY (+RW +ZI)
      }
      RW_IRAM2 0x20000000 0x00020000  {
       .ANY (+RW +ZI)
      }
    }
    

    Thank you very much for you time and help.

    Kinds Regards

Reply
  • Good Moorning,

    I finaly resolved it.

    First i found the correct sintaxys for DMA reserve.

     // Ethernet Rx DMA Descriptors
       __attribute__((section(".ARM.__at_0x2007C000")))  \ 
       ETH_DMADescTypeDef  DMARxDscrTab[ETH_RXBUFNB];
    
     // Ethernet Rx DMA Descriptors
       __attribute__((section(".ARM.__at_0x2007c080")))  \ 
       ETH_DMADescTypeDef  DMATxDscrTab[ETH_TXBUFNB];
    
     // Ethernet Rx DMA Descriptors
       __attribute__((section(".ARM.__at_0x2007C100")))  \ 
       uint8_t Rx_Buff[ETH_RXBUFNB][ETH_RX_BUF_SIZE];
    
     // Ethernet Rx DMA Descriptors
       __attribute__((section(".ARM.__at_0x2007D8D0")))  \ 
       uint8_t Tx_Buff[ETH_TXBUFNB][ETH_TX_BUF_SIZE];
    

    Second i changed the memory map in sct file.
    I changed the size of IRAM1, for have a space reserved.

    RW_IRAM1 ADDRESS SIZE{ ;RW data
            .ANY(+RW +ZI)
    }
    
    ; *************************************************************
    ; *** Scatter-Loading Description File generated by uVision ***
    ; *************************************************************
    
    LR_IROM1 0x08000000 0x00200000  {    ; load region size_region
      ER_IROM1 0x08000000 0x00200000  {  ; load address = execution address
       *.o (RESET, +First)
       *(InRoot$$Sections)
       .ANY (+RO)
       .ANY (+XO)
      }
      RW_IRAM1 0x20020000 0x0005C000  {  ; RW data
       .ANY (+RW +ZI)
      }
      RW_IRAM2 0x20000000 0x00020000  {
       .ANY (+RW +ZI)
      }
    }
    

    Thank you very much for you time and help.

    Kinds Regards

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