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Use of BVS/BPL branching together with direct PSR register access

nice day

Hi,
I would like very much to be able to use such an inline function for saturating 64-bit add of variables:

__forceinline LLONG qadd_ll( LLONG a, LLONG b){
  register APSR_Type myPSR __asm("apsr");
  LLONG c= a + b;
  if( !myPSR.b.V)
    return c;

  return myPSR.b.N ? MAXLLONG : MINLLONG;
}

Just this fails due to the following reason: For the upper 32bit add of the command "c=a+b" the compiler (5.05 or 5.03 - both behave the same) will not use the ADDS command, but only the ADD command (it should possibly be recognized by the compiler, that I use the PSR register in this context - in such a case it would be nice if the compiler would generally use the ADDS stuff to update the PSR flags ...) .

Further it would be VERY nice, if for a construction like "if( myPSR.b.V)" the compiler would use the direct BCV branch, and not this very cumbersome 4 line assembly construction which it uses currently ( as for "mPSR.b.N ?..." of course it would be very nice to use the BPL/BMI branching ...).

Further it is a bit strange that the command "register int myPSR __asm("psr")" does NOT work - according to the manual the term "psr" should be valid for "Cortex-M0, Cortex-M1, Cortex-M3, Cortex-M4" (chapter "Named register variables" in the "Compiler Ref Guide" / Help file). But in my STM32F407 project there pops up an error that the "... register specifier "psr" unknown..." . (Or is it necessary to set some special compiler flags to signify that I want to use Cortex M4 - but for STM32F407 this should be clear).

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