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Cortex-M3, initializing heap in DDR before its initialized

Hi
I have been trying to solve problem with a Cortex-M3 in how to configure the scatter file to place my heap/stack in DDR memory. I am writing a bootloader program which will run out of NVM but after start up it will need a large heap space in the DDR. I have been struggling with finding the right directives to put into the scatter file.

I have a mulitproject workspace where startup/cmsis stuff is in one and creates a library and my boot loader is in the other and links the library. Startup must use esram for its stack until the DDR is initialized or any access to DDR will crash the system. No heap needed for startup.

startup_m2sxxx.s configuration wizard allows me to define a stack and heap size which I assume is for the entire bootloader code to use. Not just startup.

Below is my current scatter file and below that is a snippet of the map it creates. This one is locates the HEAP into the DDR memory.

If I add * (HEAP) to the scatter file within the ER_DDR region, the HEAP will be located in the DDR memory space. It looks like the HEAP which is now in the DDR wants to be zeroed. The problem I have with that is when the DDR initializes, the system crashes. I assume that that HEAP is being touched before initialization which is will cause a crash. Locating the HEAP in DDR is the only thing I changed.

I need to start debugging my main design/code and get past this memory initialization.

What am I missing to get the memories placed and used correctly?

LR_IROM1 0x00000000 0x0007FFFF { ; load region size_region ER_RO 0x00000000 0x0007FFFF { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) * (+RO) } ER_RW 0x20000000 0xFFFF { ; RW data esram * (+RW +ZI)

} ER_DDR 0xA0000000 0x1FFFFFFF { ; RW data DDR flashdiskio.o (+RW +ZI) bootloader.o (+RW +ZI) mss_uart.o (+RW +ZI) mss_spi.o (+RW +ZI) * (HEAP) }
; ARM_LIB_STACKHEAP +0 EMPTY 0x200000 ; Heap and stack growing towards
; { } ; each other in the same region
}

Execution Region ER_RW (Base: 0x20000000, Size: 0x00001080, Max: 0x0000ffff, ABSOLUTE)

Base Addr Size Type Attr Idx E Section Name Object

0x20000000 0x0000001c Data RW 422 .data M2S050T_MSS_CM3_hw_platform.lib(system_m2sxxx.o) 0x2000001c 0x00000004 Data RW 951 .data c_w.l(heapauxa.o) 0x20000020 0x00000060 Zero RW 696 .bss c_w.l(libspace.o) 0x20000080 0x00001000 Zero RW 504 STACK M2S050T_MSS_CM3_hw_platform.lib(startup_m2sxxx.o)

Execution Region ER_DDR (Base: 0xa0000000, Size: 0x000012e8, Max: 0x1fffffff, ABSOLUTE)

Base Addr Size Type Attr Idx E Section Name Object

0xa0000000 0x00000020 Data RW 99 .data flashdiskio.o 0xa0000020 0x00000078 Data RW 249 .data bootloader.o 0xa0000098 0x00000080 Zero RW 4 .bss mss_uart.o 0xa0000118 0x00000108 Zero RW 68 .bss mss_spi.o 0xa0000220 0x00001000 Zero RW 98 .bss flashdiskio.o 0xa0001220 0x000000c8 Zero RW 247 .bss bootloader.o 0xa00012e8 0x00000000 Zero RW 505 HEAP M2S050T_MSS_CM3_hw_platform.lib(startup_m2sxxx.o)

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