MDK5 NAND Page Data Layout setting

I wrote a programming like this.

extern ARM_DRIVER_NAND Driver_NAND0;
ARM_DRIVER_NAND *drv_info;

void setup_nand (void)
{ ARM_NAND_ECC_INFO info;

drv_info = &Driver_NAND0;

drv_info->InquireECC (0, &info);

}

Structure 'info' got NAND ECC Information using InquireECC function.

Can I set NAND ECC Information using InquireECC function?

I wrote a programming like this.

extern ARM_DRIVER_NAND Driver_NAND0;
ARM_DRIVER_NAND *drv_info;

void setup_nand (void)
{ ARM_NAND_ECC_INFO info;

drv_info = &Driver_NAND0;

drv_info->InquireECC (0, &info);

}

Structure 'info' got NAND ECC Information using InquireECC function.

Can I set NAND ECC Information using InquireECC function?

No, you cannot set it, its the other way around. NAND driver must provide ARM_NAND_ECC_INFO structure and middleware then examines that structure using something similar to:

  ARM_DRIVER_NAND  *drv;
  ARM_NAND_ECC_INFO ecc;
  uint32_t          idx;

  idx = 0;
  while (drv->InquireECC (idx++, &ecc) == ARM_DRIVER_OK) {
    /* Some smart processing of ARM_NAND_ECC_INFO structure inside loop */
  }

ARM_NAND_ECC_INFO structure is meant as a description of driver ECC capabilities to the middleware, therefore the driver needs to provide that info, middleware examines it and sets appropriate page layout.

extern ARM_DRIVER_NAND Driver_NAND0;
ARM_DRIVER_NAND *drv_info;

void setup_nand (void)
{ ARM_NAND_ECC_INFO info; int temp=0 ;

drv_info = &Driver_NAND0;

temp = drv_info->InquireECC (0, &info) ;

printf ("temp = %d\r\n", temp);

}

result :
temp = -4

//////////////////////////////////////////////////////////////////////////

www.keil.com/.../group__execution__status.html

#define ARM_DRIVER_ERROR_UNSUPPORTED -4

Operation not supported.

The function requested an operation (for example by using an illegal control code) that is not supported.

//////////////////////////////////////////////////////////////////////////

Does it mean that InquireECC is not supported?

Yes, apparently its not supported.

What are you actually trying to achieve and which driver do you use?

I use uVision V5.17.0.0 and CMSIS Driver(Memory Bus)

When I used MDK4 before, I set nand configuration for NAND Page Data Layout.

static U32 Init (NAND_DRV_CFG *cfg) {

  /* Setup NAND Page Layout */
  cfg->PgLay->Pos_LSN  = 0;
  cfg->PgLay->Pos_COR  = 4;
  cfg->PgLay->Pos_BBM  = 5;
  cfg->PgLay->Pos_ECC  = 6;


  cfg->PgLay->SectInc  = 540;       // very important
  cfg->PgLay->SpareOfs = 512;       // very important
  cfg->PgLay->SpareInc = 540;       // very important

  /* Init NAND Driver Peripheral */
  /*          ...                */
  return RTV_NOERR;
}

I need to set SectInc value, SpareOfs value, SpareInc value.

You don't need to do that for memory bus driver - just enable Software ECC and you are done. Middleware will use default page layout for such case, because it does not need to worry about ECC placement by hardware controller.

I modified a FS_Config_NAND_0.h like this

Connect to hardware via Driver_NAND#     : 0
Device Number                            : 0
Bus Width                                : 8-bit
Page Size                           : 4096+244 bytes   // special setting. not default
Block Size                               : 64 pages
Device Size[blocks]                      : 4096
Page Caching                             : 8 pages
Block indexing                           : 16 blocks
Software ECC                             : Hamming (SLC)
Drive Cache Size                         : 8 KB

and I programmed the sample like this

finit ("N0:");
printf("finit = 0x%x\r\n",stat) ;

fmount ("N0:");
printf("fmount = 0x%x\r\n",stat) ;

stat = 0 ;
opt = "/FAT32";
stat = fformat ("N0:",opt) ;
printf("fformat = 0x%x\r\n",stat) ;


result :
finit = 0x0
fmount = 0x9
fformat = 0x9

#define fsMediaError    0x09       // Media error

I don't know why I can not format a NAND Filesystem in KEIL5(MDK5).

But I succeeded to format a NAND Filesystem using a NAND Page Data Layout in KEIL4(MDK4).

Did you make sure, that you have your external memory controller properly configured?

I used a Micron NAND(MT29F8G08ABACA / 1GByte) and its features is like this

- Page size x8: 4320 bytes (4096 + 224 bytes)
– Block size: 64 pages (256K + 14K bytes)

– Device size: 8Gb: 4096 blocks

1 page = (4K + 224 bytes)

1 block = (4K + 224) bytes x 64 pages
        = (256K + 14K) bytes


Minimum required ECC : 8-bit ECC per 540 bytes of data