We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
Hi everyone, I am working on SOC which has coresight IDT(debug and Trace) component connected to NIC-400 through AXI3 interface as STM (System Trace Macrocell). I was wondering even for next generation of SOC which will have new Arm 64 bit architecture, the STM will be connected via AXI3 or AXI4 interface. Any responses will be appreciated. Could not find anything in STM document on arm.com/support/document.
Hi, good evening. Thanks for the reply I will direct my questions there.