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Hi everyone, I am working on SOC which has coresight IDT(debug and Trace) component connected to NIC-400 through AXI3 interface as STM (System Trace Macrocell). I was wondering even for next generation of SOC which will have new Arm 64 bit architecture, the STM will be connected via AXI3 or AXI4 interface. Any responses will be appreciated. Could not find anything in STM document on arm.com/support/document.
A better forum to ask such a question may be community.arm.com.
This forum tends to be more SW focused -they could answer ARM hardware questions better over there.
Hi, good evening. Thanks for the reply I will direct my questions there.