The 8051 has only single SBUF register. But the datasheet say it can support full duplex. for full duplex communication we must have different buffers(?) for transmitting and receiving. how a single byte SBUF register work as two registers ?
from the site www.edsim51.com/.../serial.html Unlike any other register in the 8051, SBUF is in fact two distinct registers - the write-only register and the read-only register. Transmitted data is sent out from the write-only register while received data is stored in the read-only register. There are two separate data lines, one for transmission (TXD) and one for reception (RXD). Therefore, the serial port can be transmitting data down the TXD line while it is at the same time receiving data on the RXD line.
how the single buffer register act as two?
"how the single buffer register act as two?"
The failed assumption here is that you think there is "the single buffer"
Writing to SBUF writes to one buffer. Reading from SBUF reads from another buffers. Wasn't that very clearly described in the quoted text?
so SBUF is a 8 bit buffer which can actually store 16 bits?
8 bits for read only buffer another 8 bits for write only buffer?
It's a pair of peripheral registers, implemented with different latches and logic, stop thinking of it as a RAM memory.
There are likely more than 16 flip-flops involved
Time to study the so-called "bible" for the 8051 - a copy is archived for reference here:
www.danlhenry.com/.../80C51_FAM_ARCH_1.pdf www.danlhenry.com/.../80C51_FAM_HARDWARE_1.pdf www.danlhenry.com/.../80C51_FAM_PROG_GUIDE_1.pdf
Specifically, look at the Standard Serial Interface section (starting on page 9) in the 80C51 Family Hardware Description:
www.danlhenry.com/.../80C51_FAM_HARDWARE_1.pdf
And, in particular, look at the block diagrams in Figures 15 - 16: where you can clearly see the two SBUF registers - one with only Read access from the "80C51 Internal Bus"; the other with only Write access (look at the directions of the arrows).
Is that true?
Even if it does happen to be true for the very limited case of the basic, original Intel 8051, it is by no means rare nor unusual!
It is quite common to have hardware registers where Read & Write perform different functions - so better get used to it!
Having a read-only + a write-only register on top of each other is quite common. Why create separate data-write and data-read registers when a single "data" register works so well? And what action should the processor then take if someone reads from the write-only register or writes to the read-only register? Adding lots of extra transistors just to cover the corner cases of giving users separate read and write registers?
Another issue here is that there are often not even a 8-bit + 8-bit buffer "hidden" behind that data registers. On send, it's common to be at least two 8-bit registers. One for the data that gets latched and shifted out and then one other where the program stores the next byte to shift out.
And on read it's the same thing. One buffer that shifts in new data and one buffer where the program can pick up the last received byte.
Step up to an improved processor, and send and receive might suddenly get 16-byte FIFO - one in each direction. And accessed through the same 8-bit read + 8-bit write registers overlapping the same address. SBUF isn't a memory cell. It's the interface to a pipe. And the pipe might contain lots if incomming and outgoing data. And what has been dropped off for transmission can't be peeked at again - unless you are at the other side of the pipe where the data will normally arrive some time later.
... think about how utterly useless it would be if reading SBUF did just give back the last value written to it!!
The Problem with so called Bible we have to go through number of times to barely Understand it for begineers like me.
the 8051 UART is capable of Full duplex system.. But can we really implement full duplex on it? any code examples is very useful.
If "we" can implement full duplex depends on the skills "we" have.
When implementing full duplex code, it doesn't matter if the processor has separate addresses for read and write data registers, or if the read-only receive register shares address with the write-only transmit register.
Full duplex is just a question of picking up received characters when the processor flags received data as available, and giving the UART more characters when the processor flags that the UART has room for more outgoing characters. Then it's just a question of selecting polling code or making use of interrupts. And if the code should contain some robust round-robin buffers so the main loop doesn't have to be 100% in lock-step with the speed the UART can handle individual characters.