Hello everyone ,I am working with a board based on S3C2440A .
I am trying to transmit datas & commands from S3C2440A to a FRAM_CHIP hang on the S3C2440A' SPI_bus. I find that S3C2440 only have 8 bit spi_bus_width. But in fact I need the flow of bits to be continuously at least in a 32 bits. I know that some chips such as S5PC100 have 8-32 spi_bus_width,how can I make it with S3C2440?
The follow is the code I did,and there was a interval between each flow of 8bit when I observe the SPIMOSI0 & SPICLK signal with oscilloscope.
extern void inline TxSPI0_Byte(U8 data) { rSPTDAT0=data; while(!(rSPSTA0&0x01));//wait until Tx/Rx ready } extern void WrMemStatReg(unsigned char data) //CMD to operate FRAM { SPICS_LOW; //FRAM CS ON TxSPI0_Byte(WRSR_CMD);//wave A --8bit TxSPI0_Byte(data); //wave B --8bit SPICS_HIGH; } wave A and wave B are not continuously
I should have give you more information,here is the code how i set the SPICON:
void fram_con_init(void){ rGPCCON=0x45; rGPECON=((2<<26)|(2<<24)|(2<<22)); rGPCUP&=0xffff;//pullup_enable---out rGPEUP&=0xf7ff; //gpe11,12,13---so,si,clk } extern void FRAM_SPI_Init(void) { fram_con_init(); FRAM_HOLD_HIGH; SPICS_HIGH; //FRAM_SPI CS disable rSPPRE0=PCLK/2/SpiBaudRate-1;//SET SpiBaudRate rSPCON0=(0<<6)|(1<<5)|(1<<4)|(1<<3)|(0<<2)|(0<<1)|(0<<0); //Polling mode,dis-SCK,master,low,B,normal rSPPIN0=(0<<2)|(0<<0);//dis-ENMUL,SBO,release }
Any suggestion will be great!
Thanks for the help.
Somebody help me? Still waiting ...
What are you waiting for?
That people who doesn't use your processor will spend their payed worktime to retrieve the datasheet for your processor and read all there is about the SPI functionality?
Have you considered what happens if you run the slave-select signal manually? Then you can run any number of 8-bit transfers before you restore the slave-select. A synchronous protocol like SPI don't care if there is a bit of extra delay every 8 bits as long as the total data stream manages to transfer data fast enough for the intended use case.
Thanks for your suugestion .I have considered your suggestion. It must be a good idea in some situations that the slave can be transform to a host, but the FRAM can not be a host, I have to simulate a SPI clk artificially,and the SPI controller lost its significance,and I have to trans/recieve data all by my self. Are you agree with me?
I have considered your suggestion. It doesn't look like you did, because nobody suggested anything even remotely like your next statement: It must be a good idea in some situations that the slave can be transform to a host,
Nobody said anything about switching the roles of SPI master and slave.
But in fact I need the flow of bits to be continuously at least in a 32 bits.
I'm close to 100% certain you don't. If you do, that's not SPI.
"But in fact I need the flow of bits to be continuously at least in a 32 bits."
Very rarely you will run into such a beast that requires "continuous" bits to be transmitted - aka no "pause" of the serial clock.
Having said that, the typical way for (near) continuous transmission is to use an interrupt, particularly in cases where the module is double-buffered (for example, it has a transmitter empty status).
On the receiver side, you can use similar tricks. The difficulty there is that spi can be of very high speed and in those cases utilizing DMA is your only hope for non-interrupted reception.
"Have you considered what happens if you run the slave-select signal manually? Then you can run any number of 8-bit transfers before you restore the slave-select. A synchronous protocol like SPI don't care if there is a bit of extra delay every 8 bits as long as the total data stream manages to transfer data fast enough for the intended use case."
I have tried to run the slave-select signal manually,I can set the CS as I wish.But for it doesn't work.The SPI of 2440 at most 8 bit as a unit.I am trying the DMA mode or Interrupt mode,but i'm afraid that S3C2440 cannot make if I didn't use GPIO to Simulate. And the S5PC100 surely can make it.
Don't you realize that if you run the slave select signal manually, then it doesn't matter if your chip can only do 8 bit wide SPI? Four SPI transfers will send 4*8 = 32 bits of data.
So: - activate slave select - do 8-bit write - do 8-bit write - do 8-bit write - do 8-bit write - deactivate slave select will make the FRAM see a single 32-bit transfer.
The four 8-bit writes may use polling, FIFO, DMA or whatever you like. It really doesn't matter for the FRAM chip.
" So: - activate slave select - do 8-bit write - do 8-bit write - do 8-bit write - do 8-bit write - deactivate slave select will make the FRAM see a single 32-bit transfer.
The four 8-bit writes may use polling, FIFO, DMA or whatever you like. It really doesn't matter for the FRAM chip. "
Thank you all,everyone!Your Advisitions are usefull to open my mind.
I have tried polling,I failed to write and read the fram,so I just cannot eliminate the possibility that fram need "continuous" bits. The next week I will try interrupt mode,to get "continuous" bits. If someone have successfully used this chip to operate a spi FRAM,would you please give me the code for a preference? Best regards!
My email :oucaijun.happy@163.com
"I have tried polling,I failed to write and read the fram,so I just cannot eliminate the possibility that fram need "continuous" bits."
The FRAM communication doesn't see time other than as changes to the SPI clock flanks. So it doesn't care if the clock signal freezes for a while. But it is important that the clock and MOSI signals doesn't go tristate while the slave select is activated.
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