Hi pals.
I have faced some problem with Keil's ARM simulator.
IDE-Version: µVision V4.20.03.0 Toolchain: MDK-ARM Standard Version: 4.20 Toolchain Path: BIN40\ C Compiler: Armcc.Exe V4.1.0.644 Assembler: Armasm.Exe V4.1.0.644 Linker/Locator: ArmLink.Exe V4.1.0.644 Librarian: ArmAr.Exe V4.1.0.644 Hex Converter: FromElf.Exe V4.1.0.644 CPU DLL: SARMCM3.DLL V4.20 Dialog DLL: DARMCM1.DLL V1.7.0.0
I choose Nuvoton Cortex-M0 first. Made simulator's .ini file.
MAP 0x00000000, 0x0001EFFF READ EXEC MAP 0x0001F000, 0x0001FFFF READ WRITE EXEC MAP 0x20000000, 0x20003FFF READ WRITE MAP 0x50000000, 0x5001C3FF READ WRITE MAP 0x40004000, 0x400EFFFF READ WRITE MAP 0x40100000, 0x401A3FFF READ WRITE MAP 0xE000E010, 0xE000ED8F READ WRITE
Started emulation. It runs, unless faces the code (disassembled here):
static __INLINE void __ISB() { __ASM volatile ("isb");}
The instruction causes Hardware fault.
I have asked Nuvoton, and was insistive. They answered: If you entering the hard fault, It mean CPU fetch the wrong code, and it can run normally. For the Cortex-M0, it had 3 pipe-line stage, when you run __ISB instruction, it will flush the pipeline fetch code, and fetch it again. I think the Kei simulator cannot simulate the condition, you can contact with Keil company for the issue.
I thought - may be the issue is in Nuvoton crystal's model? Have choosen generic type of ARM, Cortex-M0 ARM. It still fails.
At the same time, when I start Nuvoton's sample code, for FMC, using the same, mine .ini file, it works just good. May be - it does not face that vicious instruction? But - hardly, this instruction is called in many cases there.
In Emulator mode, everything works just fine.
May anybody know the key to the Simulator of M0 core?
Alex.