Hi, I was looking at the PrimeCell UART (PL011) registers and I see that there is a register for masking the bits Interrupt Mask Set/Clear Register (UARTIMSC). Could anyone please tell me what the functionality of this register is with respect to the Raw interrupt status register? And when we say that the mask is set, does it mean that the interrupt will be not shown on the Uart Interrupt Line?
What does the documentation for the processor say?
But an interrupt mask is used to specify which interrupt sources that should be enabled. For example that a program wants an interrupt when data is received, but do not want an interrupt that the transmitter is empty - because the program has no data to send yet.
The documentation should inform you very clearly if a one allows the interrupt source or blocks the interrupt source.