Linker Errors: L1 and L2

Hallo guys,
I have great difficulties linking my code. The compiler somehow does not know where to find my cypress registers declared in this header "fx2regs.h". I'm trying to build a firmware for my cypress usb on my FPGA. I keep getting 124 Errors of type:
***WARNING L1/L2: UNRESOLVED EXTERNAL SYMBOL
SYMBOL: USBCS etc.
MODULE: .fw\obj (FW)
Example code:
----------------------------------------------------------------------------------------
#pragma NOIV // Do not generate interrupt vectors
//////////////////////////////////////////////////////////////////////////////////
// $Source: /cvs/dvbt2/cypress_usb/usb_tx.c,v $
// $Revision: 1.3 $
// $Date: 2009/01/27 13:21:41 $
// $Author: Kocks $
// DVB-T2
// Firmware for Cypress USB controller
//////////////////////////////////////////////////////////////////////////////////
#include "fx2.h"
#include "fx2regs.h"
#include "fx2sdly.h" // SYNCDELAY macro

extern BOOL GotSUD; // Received setup data flag
extern BOOL Sleep;
extern BOOL Rwuen;
extern BOOL Selfpwr;

BYTE Configuration; // Current configuration
BYTE AlternateSetting; // Alternate settings

#define VR_NAKALL_ON 0xD0
#define VR_NAKALL_OFF 0xD1

//-----------------------------------------------------------------------------
// Task Dispatcher hooks
// The following hooks are called by the task dispatcher.
//-----------------------------------------------------------------------------

#define USE_EXTERNAL_CLOCK 0

void TD_Init(void) // Called once at startup
{

// Registers which require a synchronization delay, see section 15.14 // FIFORESET FIFOPINPOLAR // INPKTEND OUTPKTEND // EPxBCH:L REVCTL // GPIFTCB3 GPIFTCB2 // GPIFTCB1 GPIFTCB0 // EPxFIFOPFH:L EPxAUTOINLENH:L // EPxFIFOCFG EPxGPIFFLGSEL // PINFLAGSxx EPxFIFOIRQ // EPxFIFOIE GPIFIRQ // GPIFIE GPIFADRH:L // UDMACRCH:L EPxGPIFTRIG // GPIFTRIG

// Note: The pre-REVE EPxGPIFTCH/L register are affected, as well... // ...these have been replaced by GPIFTC[B3:B0] registers

// set the CPU clock to 48MHz CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;

// set the slave FIFO interface to 48MHz // IFCLK pin is driven by the internal 48Mhz clock wth inverted polarity
#if USE_EXTERNAL_CLOCK == 1 IFCONFIG = 0x73; // 01110011
#else IFCONFIG = 0xF3; // 11110011
#endif // bit 7: IFCLKSRC == 0x01: internal clock is used // bit 6: 3048MHZ == 0x01: 48 MHz clock // bit 5: IFCLKOE == 0x01: IFCLK pin driven // bit 4: IFCLKPOL == 0x01: output clock is inverted // bit 3: ASYNC == 0x00: slave FIFOs operate synchronously // bit 2: GSTATE == 0x00: // bit 1-0: IFCFG[1:0] == 0x03: interface mode: slave FIFO interface

SYNCDELAY; REVCTL = 0x03; // see TRM p.131 SYNCDELAY;

// default: all endpoints have their VALID bit set // default: TYPE1 = 1 and TYPE0 = 0 --> BULK // default: EP2 and EP4 DIR bits are 0 (OUT direction) // default: EP6 and EP8 DIR bits are 1 (IN direction) // default: EP2, EP4, EP6, and EP8 are double buffered

// configuration of endpoints // endpoint 1 EP1OUTCFG = 0xA0; EP1INCFG = 0xA0; SYNCDELAY; // see TRM section 15.14

// endpoint 2 EP2CFG = 0xEA; // bit 7: VALID == 0x01: endpoint valid // bit 6: DIR == 0x01: IN endpoint // bit 5-4: TYPE == 0x02: bulk endpoint // bit 3: SIZE == 0x01: size = 1024 // bit 1-0: BUF == 0x02: double buffering SYNCDELAY;

// endpoint 4 (disabled) EP4CFG = 0x62; SYNCDELAY;

// endpoint 6 EP6CFG = 0xEA; SYNCDELAY;

// endpoint 8 (disabled) EP8CFG = 0x62; SYNCDELAY;

// reset all FIFOs FIFORESET = 0x80; SYNCDELAY;

FIFORESET = 0x02; SYNCDELAY;

FIFORESET = 0x04; SYNCDELAY;

FIFORESET = 0x06; SYNCDELAY;

FIFORESET = 0x08; SYNCDELAY;

FIFORESET = 0x00; SYNCDELAY;

// configure FIFOs for AUTOIN-mode EP2FIFOCFG = 0x4D; // bit 6: INFM1 == 0x01: assert full flag one sample earlier than when the full condition occurs // bit 5: OEP1 == 0x00 // bit 4: AUTOOUT == 0x00 // bit 3: AUTOIN == 0x01: incoming data is automatically packetized and transmitted, without CPU intervention // bit 2: ZEROLENIN == 0x01: enable zero length IN packets // bit 0: WORDWIDE == 0x01: 16 bit word width SYNCDELAY;

EP6FIFOCFG = 0x4D; SYNCDELAY;

// set block length to 1024 (only permitted for EP2 and EP6) EP2AUTOINLENH = 0x04; SYNCDELAY; EP2AUTOINLENL = 0x00; SYNCDELAY;

EP6AUTOINLENH = 0x04; SYNCDELAY; EP6AUTOINLENL = 0x00; SYNCDELAY;

// Rwuen = TRUE; // Enable remote-wakeup
}

void TD_Poll(void) // Called repeatedly while the device is idle
{ // this function is empty since the USB controller is operating in FIFO slave mode
}

BOOL TD_Suspend(void) // Called before the device goes into suspend mode
{ return(TRUE);
}

BOOL TD_Resume(void) // Called after the device resumes
{ return(TRUE);
}

//-----------------------------------------------------------------------------
// Device Request hooks
// The following hooks are called by the end point 0 device request parser.
//-----------------------------------------------------------------------------

BOOL DR_GetDescriptor(void)
{ return(TRUE);
}

BOOL DR_SetConfiguration(void) // Called when a Set Configuration command is received
{ // inserted recently if( EZUSB_HIGHSPEED( ) ) { // ...FX2 in high speed mode EP2AUTOINLENH = 0x04; SYNCDELAY; EP6AUTOINLENH = 0x04; // set core AUTO commit len = 512 bytes SYNCDELAY; EP2AUTOINLENL = 0x00; SYNCDELAY; EP6AUTOINLENL = 0x00; } else { // ...FX2 in full speed mode EP2AUTOINLENH = 0x00; SYNCDELAY; EP6AUTOINLENH = 0x00; // set core AUTO commit len = 64 bytes SYNCDELAY; EP2AUTOINLENL = 0x40; SYNCDELAY; EP6AUTOINLENL = 0x40; } Configuration = SETUPDAT[2]; return(TRUE); // Handled by user code
}

BOOL DR_GetConfiguration(void) // Called when a Get Configuration command is received
{ EP0BUF[0] = Configuration; EP0BCH = 0; EP0BCL = 1; return(TRUE); // Handled by user code
}

BOOL DR_SetInterface(void) // Called when a Set Interface command is received
{ AlternateSetting = SETUPDAT[2]; return(TRUE); // Handled by user code
}

BOOL DR_GetInterface(void) // Called when a Set Interface command is received
{ EP0BUF[0] = AlternateSetting; EP0BCH = 0; EP0BCL = 1; return(TRUE); // Handled by user code
}

BOOL DR_GetStatus(void)
{ return(TRUE);
}

BOOL DR_ClearFeature(void)
{ return(TRUE);
}

BOOL DR_SetFeature(void)
{ return(TRUE);
}

BOOL DR_VendorCmnd(void)
{ return(FALSE);
} ----------------------------------------------------------------------------------
Can somebody point me to the right direction.