• State Not Answered
  • Locked Locked
  • Replies 4 replies
  • Subscribers 21 subscribers
  • Views 899 views
  • Users 0 members are here
2025 survey

We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.

Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Zig-Saw Puzzle. Cant put the pieces of Flash file system on Nand

Ash J

Do i have to enable the "Flash Drive" along with the "Nand Flash" in the file_Config.c (Flash Configuration File) to implement flash file system on parallel nand flash?

So what is a sector on parallel nand chip? is it a block or a group of block or pages?
I have to make the FS_FlashDev.h file but the documentation speak about "sector".

#define FLASH_DEVICE
   DSB(0x10000, 0x000000),     /* Sector Size 64kB */ \ 
   DSB(0x10000, 0x010000),     /* Sector Size 64kB */ \ 
#define SF_NSECT    32 //-> is this the total number of sectors?

  • 0 Arm Employee Badge 

    #define EMC_ALE_ADDR    0x00080000         //how is this value decided
#define EMC_CLE_ADDR    0x00100000         //IC datsheet doesnt specify any such thing

    Take a look at your hardware connections of the ALE and CLE lines.

    For the example above:
    ALE would be on the address line 19 (0x80000: bit 19 is set!)
    CLE would be on the address line 20 (0x100000: bit 20 is set!)

  • 0 in reply to Vladimir Umek

    The ALE (A24), CLE(A25) and the !OE (P4.24) signals now toggle. But the CS1 (chip select)(P4.31) pin does not toggle. It remains high.

    All the pins are configured as "Plain output" mode (neither pull-up nor pull down) and "Normal Mode" (Open Drain mode disabled). No external Pull-up resistors connected.

    #define EMC_NAND_BASE  (0x80000000 + 0x1000000 * NAND0_HW_CS)    //NAND0_HW_CS = 0x01
#define EMC_ALE_ADDR    0x01000000
#define EMC_CLE_ADDR    0x02000000

#define EMC_DATA8 *((volatile U8 *)(EMC_NAND_BASE))
#define EMC_ADDR8 *((volatile U8 *)(EMC_NAND_BASE + EMC_ALE_ADDR))
#define EMC_CMD8  *((volatile U8 *)(EMC_NAND_BASE + EMC_CLE_ADDR))

    When i try to read the Flash memory ID, i get 0x90909090. (i.e. 1001 binary -> 2 highs 2 lows)
    And when i try to read the page, 8bytes at a time, i get 0x30 (i.e. 0011 binary -> 2 highs 2 lows).
    Unable to figure out.

  • 0 Arm Employee Badge in reply to Ash J

    Which uC exactly do you use?

    Since, to trigger a particular chip select, data must be written to memory region assigned to it (this is documented in a User Manual or Reference Manual of your uC in a chapter describing External Memory Controller)

  • 0 in reply to Vladimir Umek

    i am using LPC1788 controller. The user manual is not much descriptive. Had to read a lot of data of other ic (user manuals and application notes).

    The FlashID is correctly being read now. Will implement further and will keep posting.

    Thanks a lot.