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SPI1 seems to behave strange?

HenkvW

Hi,

I'm using the STM32F103ZET6 uC on the MCBSTM32E board. Our company is developing a PCB with two of those uC on it communicating with each other through SPI.
As the PCB is not developed yet I would like to test these inter-SPI communication by interconnection SPI1 and SPI2 on the MCBSTM32E board. I connected SPI1 to SPI2 one on one meaning with their SCK/NSS/MOSI/MISO signals. So for example SPI1.SCK is connected to SPI2.SCK, e.t.c..
I use swapping from GPIO to AFN (Alternate function) for controlling two on the fly changing configurations: 1: SPI1-master/SPI2-slave (with DMA) 2: SPI2-master/SPI1-slave (with DMA)
From SPI1 to SPI2 it works fine.
From SPI2 to SPI1 the receiving SPI1 only generates SPI1-RXNE (rx buffer not empty) interrupts for the first 4 bytes and then simply does not occur anymore although receiving SCK and MOSI data is still active and DMA buffer size is set to 100.
SPI2 generates SPI2-RXNE interrupts for all received (26) bytes.

I tried and studied lots of hours but could not find the cause. The Errata pdf mentions some issues with SPI's but not this kind.

Anybody any idea?

Thanks

Henk

Parents Reply Children
  • 0 in reply to Ash J

    Yes - the two clocks should be connected to each other. What would be strange with that? The slave needs to see the same bit clock that the master is using. Just that the master might support a larger range of baudrates than the device - it depends a bit of implementation details in the specific chip.

    And MOSI on one interface (Master Out Slave In) should be connected to MISO (Master In Slave Out) of the other interface. Setting one interface as master and one as slave, will decide which side will drive the MISO pin

    When A is master
    MOSI => MOSI
    MISO <= MISO

    When B is master
    MOSI <= MOSI
    MISO => MISO

    Note that SPI is a bus design, where there can be more than two devices on the bus that may transmit. That means that the interconnects must be straight.

    Then depending on design, you might connect slave-select to slave-select and configure the pin as GPIO for the master and as slave-select for the slave. Or configre it as slave-select for both devices, while configuring the SPI master to actively control the slave-select line.

  • 0 in reply to ImPer Westermark

    Oops (Sorry).
    Ya, realized it that it can be done.