Hi,
I am using the STM32F207 (Cortex-M3) device with MDK 4.50. I have an ISR function which calls isr_evt_set() to send a “Tick” event when a 1ms h/w timer tick occurs. A task calls os_evt_wait_and() and waits indefinitely for the “Tick” event. When the event arrives it does some processing and then waits for the next “Tick” event.
This all works OK until I set a breakpoint. When I hit F5 to continue code execution I get an os_error() with err_code 2 (OS_ERR_FIFO_OVF). This implies that the ISR FIFO queue buffer has overflowed. This does not happen at any other time accept when continuing after a breakpoint. I have changed the OS_FIFOSZ size from 16 to 96 but this made no difference.
I do not get this problem if I run the same code on an STR91x (ARM9).
Any ideas?
hmm...you wrote you don't have this problem with a 10ms tick. can you increase the FIFO any further and check if it will work with an 1ms tick?
i just checked the OS_FIFOSZ setting and in the comments it seems like there is an 96 entry limit. but if i try 255 the source will be compiled without error and i just downloaded my code and it still is working. But OS_FIFOSZ = 256 crashes!
but maybe OS_FIFOSZ = 255 is sufficient for you?
I did try 96 but no luck. I will try the undocumented 255.
255 did not work either. I can't go any higher because of the following line in RTX_lib.c:
U8 const os_fifo_size = OS_FIFOSZ;