Hello! I try to get the I2C2-Interface of my LPC2362 to work in RTX. I already got it work without RTX, where I oriented on sample code. When I try the I2C2-Interface with the RTX, I observe that I cannot start the I2C-Communication (timeout). I assume that I do not get the interrupts from the I2C-Interface correctly (correct me if I am wrong). Is there some special initialisation necessary, when using Interrupts in RTX? I configured the following, and I have no adaption in rtx_config.c...
VICVectAddr30 = (U32)I2C2MasterHandler; /* pointer for ISR */ VICVectCntl30 = 30; /* use it for I2C2 Interrupt */ VICIntEnable = (1 << 30); /* Enable Interrupt */
I apreciate any help. Thanks a lot in advance! Stefan
We have the same problem but with an LPC1768 (Cortex M3)
It works without multitasking! I use the library of NXP : ics.nxp.com/.../
What needs to change so that the library works with RTX? The "I2C0_IRQHandler (void)" is the interrupt function. It's my understanding. But what time is defined in RTX that this function is an interrupt? When I add __ irq function after it changes nothing! You must add it sth else?
Thank you for your help
Salut Bernard!
In my Project, I use __irq suffix to announce that "I2C0_IRQHandler (void)" as the Interupt service routine. I don't know why it is not placed in the library you've given. But I am also using an ARM7 instead of an M3.
Concerning your other question with the definition defined in RTX that this function is an interrupt: This is done in "void I2C0Init( void )". There you have the command
/* Install interrupt handler */ NVIC_EnableIRQ(I2C0_IRQn);
I do not know the implementation of this function, but I assume that it should perform something similar as in my code: Give the pointer to the ISR, set a priority for the interrupt and enable it.
VICVectAddr30 = (U32)I2C2MasterHandler; /* pointer for ISR */ VICVectCntl30 = 0x01; /* use it for I2C2 Interrupt; describes priority[0..15] */ VICIntEnable = (1 << 30); /* Enable Interrupt */
Maybe you can have a closer look what this function actually does, and whether there are mayor differences between ARM7 and M3.
Good Luck! Stefan
www.arm.com/.../cortex-m3_programming_for_arm7_developers.pdf
For the ARM7TDMI processor, it is common for the interrupt handling to be implemented with an assembly code wrapper. This is required for nested interrupt handling, and for redirecting of interrupt requests to various interrupt handlers due to the IRQ vector being shared between all interrupts except FIQ (Fast Interrupt). This type of code wrapper can be completely eliminated on the Cortex-M3 processor because the exception mechanism automatically handles nested interrupts and executes the correct interrupt handler.
Cortex-M3 processor exception handlers can be programmed as a C function with the saving and restoring of registers R0-R3, R12, R13, PSR and PC being carried out by the processor as part of its exception entry and return sequence.