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ARM Cortex M3: 32 bit x 32 bit signed integer multiplication worst case scenario

ARM cortex M3, no FPU.

My specific question:

How many cycles does a worst case 32 bit (signed integer) x 32 bit (signed integer) with 64-bit (signed integer) output multiplication take?

General question:

Where can I find information on these kind of things? Is this shown somewhere in the documentation that I have not found yet? I am not only interested in worst case, but that will do if no other information is available.

Thanks in advance!

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