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Problem with RL-TCPnet and SPI bus interrupt

hello forum
im using uvision V4.6.0.0 with MDK-ARM professional Version:4.60.0.0
toolchain.
i want to test RL-TCPnet with LPC1768 micro and DP83848C PHY Transiver
(i have designed a board myself as the same as your MCB17xx board).
i have loaded your LEDSwitch Example into my micro and it works fine
and i can send and recive data through UDP socket and i can control LED in my board.
i want to know in this example Ethernet controller works in Polling mode or interrupt mode???
my problem is that im using SPI bus in slave mode with interrupt service routin that i recive some datas from other controller(DSP)continuously and it works too but every time that i recive other packet through LAN my SPI peripheral hangs and dont recive other datas.
could you let me know how can i solve this problem?
im waiting for your answer.
best regards.
thanks.

Parents
  • Note that a SPI slave have very little time to reload the transmit register whenever it gets an interrupt.

    Are you using the SPI device, or are you using the SSP (Synchronous Serial Port) device in SPI mode? The SSP device, running in SPI mode, allows you to use a FIFO so you can prepare multiple words for transmission and you can pick up multiple received words.

    The SSP also supports DMA use, where you can have very large transgers ongoing.

    Of course, the above will still fail if the SPI master runs semi-duplex and sends a query and expects your slave side to directly on end of the query be able to start sending out the answer. In that case, FIFO or DMA can't help you. Then you just have to be there and react very quickly to the receive interrupt.

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  • Note that a SPI slave have very little time to reload the transmit register whenever it gets an interrupt.

    Are you using the SPI device, or are you using the SSP (Synchronous Serial Port) device in SPI mode? The SSP device, running in SPI mode, allows you to use a FIFO so you can prepare multiple words for transmission and you can pick up multiple received words.

    The SSP also supports DMA use, where you can have very large transgers ongoing.

    Of course, the above will still fail if the SPI master runs semi-duplex and sends a query and expects your slave side to directly on end of the query be able to start sending out the answer. In that case, FIFO or DMA can't help you. Then you just have to be there and react very quickly to the receive interrupt.

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