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usb hostlite

rj j

Hi

In following function i did n,t get TD_TOGGLE_0 value and TD_TOGGLE_1
and this line ed->HeadTd = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
What,s the need of AND Ooperation of ed->HeadTd with 0x00000002.
CAN ANYBODY EXPLAIN IT

USB_INT32S  Host_ProcessTD (volatile  HCED       *ed,
                            volatile  USB_INT32U  token,
                            volatile  USB_INT08U *buffer,
                                      USB_INT32U  buffer_len)
{
    volatile  USB_INT32U   td_toggle;


    if (ed == EDCtrl) {
        if (token == TD_SETUP) {
            td_toggle = TD_TOGGLE_0;
        } else {
            td_toggle = TD_TOGGLE_1;
        }
    } else {
        td_toggle = 0;
    }
    TDHead->Control = (TD_ROUNDING    |
                      token           |
                      TD_DELAY_INT(0) |
                      td_toggle       |
                      TD_CC);
    TDTail->Control = 0;
    TDHead->CurrBufPtr   = (USB_INT32U) buffer;
    TDTail->CurrBufPtr   = 0;
    TDHead->Next         = (USB_INT32U) TDTail;
    TDTail->Next         = 0;
    TDHead->BufEnd       = (USB_INT32U)(buffer + (buffer_len - 1));
    TDTail->BufEnd       = 0;

    ed->HeadTd  = (USB_INT32U)TDHead | ((ed->HeadTd) & 0x00000002);
    ed->TailTd  = (USB_INT32U)TDTail;
    ed->Next    = 0;

    if (ed == EDCtrl) {
        HcControlHeadED = (USB_INT32U)ed;
        HcCommandStatus = HcCommandStatus | OR_CMD_STATUS_CLF; //this bit iS set by HCD WHEN IT ADD TD CONTROL LIST IS FILLED
        HcControl       = HcControl       | OR_CONTROL_CLE;     //control list enable
    } else {
        HcBulkHeadED    = (USB_INT32U)ed;
        HcCommandStatus = HcCommandStatus | OR_CMD_STATUS_BLF;
        HcControl       = HcControl       | OR_CONTROL_BLE;
    }

    Host_WDHWait();

//    if (!(TDHead->Control & 0xF0000000)) {
        if (!HOST_TDControlStatus) {
        return (OK);
    } else {
        return (ERR_TD_FAIL);
    }
}

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