Hi,
i'm using LPC3250 to interface with micron MT48LC16M16A2(4 Meg x 16 x 4 banks) SDR SDRAM.i followed Blinky program as example and initialized for my 256Mb SDRAM.i have written data on 16-bit wide on the EMC_DYCS0_N memory location as below
#define EMC_DYSC0 (*(volatile unsigned short *)0x80000000) #define EMC_DYSC1 (*(volatile unsigned short *)0x80000002) #define EMC_DYSC2 (*(volatile unsigned short *)0x80000004) #define EMC_DYSC3 (*(volatile unsigned short *)0x80000006) #define EMC_DYSC4 (*(volatile unsigned short *)0x80000008)
writen data into memory
EMC_DYSC0 = 0x0000; write_change(); // Gives delay of 2us and send Normal command EMC_DYSC1 = 0x1111; write_change(); EMC_DYSC2 = 0x2222; write_change(); EMC_DYSC3 = 0x3333; write_change(); EMC_DYSC4 = 0x4444;
after that i'm reading back from the same locations. But i'm getting as
location 0:0000 location 1:0000 location 2:1111 location 3:1111 location 4:2222
as above data is repeating on two memory locations. Gone through data sheet of LPC3250 and SDRAM. But struck here. Please help to get out of this.
Thank you
"i followed Blinky program as example and initialized for my 256Mb SDRAM."
Looks like you haven't initialised the SDRAM and/or control registers correctly.
The startup file LPC32x0.s does not make this easy and it is sorely lacking in useful detail. You will almost definitely have to modify the constants:
SDRAM0_MODE_REG EQU 0x8000C000 ; SDRAM0 Mode Register Address SDRAM0_EXT_MODE_REG EQU 0x8102C000 ; SDRAM0 Extended Mode Reg Address SDRAM1_MODE_REG EQU 0xA0018000 ; SDRAM1 Mode Register Address SDRAM1_EXT_MODE_REG EQU 0xA102C000 ; SDRAM1 Extended Mode Reg Address
The address specified is used to pass configuration information to the SDRAM.
Find the appropriate details in the documentation you have for your particular SDRAM.
Thanks for the reply,
Is the above initialization for ONE SDRAM or TWO SDRAM's? Because We are using only one SDRAM. and running with the 16-bit wide data lines. These are my setting on LPC32x0.s file.
SDRAM0_MODE_REG EQU 0x80018000 ; SDRAM0 Mode Register Address SDRAM0_EXT_MODE_REG EQU 0x8102C000 ; SDRAM0 Extended Mode Reg Address SDRAM1_MODE_REG EQU 0xA0018000 ; SDRAM1 Mode Register Address SDRAM1_EXT_MODE_REG EQU 0xA102C000 ; SDRAM1 Extended Mode Reg Address
one more doubt is on hard ware design in static memory 8-bit address starts with A[23:0] 16-bit address starts with A[23:1] 32-bit address starts with A[23:2] what if it is in case of Dynamic memory?
"Is the above initialization for ONE SDRAM or TWO SDRAM's?"
It's for neither. These lines are simply defining constants that can be used in code further down the source file. You can select within the IDE whether you want to include the code to initialise bank0 and/or bank1.
It looks like your addresses are the same as the default startup code. Have you checked that the addresses are correct for your particular hardware configuration?
"one more doubt is on hard ware design in static memory 8-bit address starts with A[23:0] 16-bit address starts with A[23:1] 32-bit address starts with A[23:2] what if it is in case of Dynamic memory?"
I think, with this device, you must always connect the least significant address line to A0 regardless of the data bus width or memory type.