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lpc3250 emc boot

hi

i am trying to boot lpc3250 from emc (static memory cs0). using 2x16 parallel sst39lf800a.
flash is programmed correctly (reading validation code 0x13579bd2 at 0xe0000000). but it is not booting. how to proceed further?

and i also had i doubt in my linker setting.

link.sct:
--------

LR_ROM1 0xE0000000 0x00008000 { ; load region size_region ER_ROM1 0xE0000000 0x00008000 { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } RW_IRAM1 0x08000000 0x00040000 { ; RW data .ANY (+RW +ZI) }
}

is this correct?

Parents
  • "arm execution starts at location 0."

    Yes it does ... But, your 2nd level bootstrap loader doesn't.

    "after reset boot map reg will be set to 1 by processor"

    Yes ... as is clearly shown in the flowchart for the boot process.

    "here only i am confused."

    Sorry, but I don't think that is the only place. The IRAM is mapped to two areas.

    "... but no output..."

    No output of what?

    "next???"

    You need to consider what might be going wrong and see if you can find any evidence of it.

    Obviously, you need to consider debug code early in the startup of your 2nd level bootloader.

Reply
  • "arm execution starts at location 0."

    Yes it does ... But, your 2nd level bootstrap loader doesn't.

    "after reset boot map reg will be set to 1 by processor"

    Yes ... as is clearly shown in the flowchart for the boot process.

    "here only i am confused."

    Sorry, but I don't think that is the only place. The IRAM is mapped to two areas.

    "... but no output..."

    No output of what?

    "next???"

    You need to consider what might be going wrong and see if you can find any evidence of it.

    Obviously, you need to consider debug code early in the startup of your 2nd level bootloader.

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