As per some document reference that I found on net the expected vector table generated by assembler is give below
__Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler [...more vectors...]
00000000 LDR PC, =__initial_sp 00000004 LDR PC, =Reset_Handler 00000008 LDR PC, =NMI_Handler
but if we see actual code, it will be like
0x00000000 0268 LSLS r0,r5,#9 0x00000002 1000 ASRS r0,r0,#0 0x00000004 0169 LSLS r1,r5,#5 0x00000006 0000 MOVS r0,r0 0x00000008 0171 LSLS r1,r6,#5 0x0000000A 0000 MOVS r0,r0 0x0000000C 0173 LSLS r3,r6,#5 0x0000000E 0000 MOVS r0,r0
Any idea where will be the vector table?
Thanks
The vector table does not contain code - it contains addresses.
Therefore, if you try to interpret it as code, you will get nonsense.
As per ARM manual first instruction that executed after reset is the Init stack pointer and after that it will jump to reset handler that actually an application. But this we cannot see when we debug a project in KIEL ARM. Same way if we see in 8051 project (KEIL PK51) we can clearly see that 0x00 location is jump instruction that jumps to start up code. also same way we can see the other Jump table to other interrupt vectors
Please help to understand
Thanks Mahesh
"As per ARM manual first instruction that executed after reset is the Init stack pointer"
Not quite!
This is not an instruction - it is part of the hardware startup sequence.
A more helpful way to say it might be that the SP (stack pointer) is loaded from the 1st entry in the vector table, then the PC (program counter) is loaded from the 2nd entry, and then the processor runs from there - using that value of the PC to fetch its first instruction.
Again, in ARM, the vector table contains addresses.
The 8051 is quite different! In the 8051, the so-called "vector table" contains instructions
Some might argue that the 8051 does not have a true "Vector" Table...
See: www.8052.com/.../181745.
Link without the dot: www.8052.com/.../181745