STM32f103 (cortex) anyone seen any advantage from bit-banding. I have employed it a few places and always found it to be no savings in time or space.
Erik
Bit banding for peripheral registers solves a problem that didn't exist, since vendors have implemented reasonable workarounds a long time ago. In most cases registers where bit manipulation matters (e.g. GPIO) are implemented as set/clear registers which already provide atomic access in an even better way, where you can modify multiple bits with a single access.
Having said that, bit banding is still useful for SW flags and semaphores.
Bit banding is an optional feature on newer Cortex-M processors and may not always be available.
Kind regards Marcus http://www.doulos.com/arm/
Some peripheral registers have separate set/clear addresses, but not all registers that could use atomic bit updates include such features. I'm not sure that bit banding offers any advantage over declaring as a standard that writes to addresses 0x21000000-21FFFFFF behave as set-bits-only versions of corresponding addresses 0x20000000-20FFFFFF, and likewise writes to 0x22000000-0x22FFFFFF would behave as clear-bits-only; one could do likewise with RAM. Such an implementation could probably be simpler and cheaper than bit-banding (since it would only require feeding each peripheral or memory a write-high-bits and write-low-bits write-enable signals) but that's not how ARM did things.