bit-banding

Some peripheral registers have separate set/clear addresses, but not all registers that could use atomic bit updates include such features. I'm not sure that bit banding offers any advantage over declaring as a standard that writes to addresses 0x21000000-21FFFFFF behave as set-bits-only versions of corresponding addresses 0x20000000-20FFFFFF, and likewise writes to 0x22000000-0x22FFFFFF would behave as clear-bits-only; one could do likewise with RAM. Such an implementation could probably be simpler and cheaper than bit-banding (since it would only require feeding each peripheral or memory a write-high-bits and write-low-bits write-enable signals) but that's not how ARM did things.

Some peripheral registers have separate set/clear addresses, but not all registers that could use atomic bit updates include such features. I'm not sure that bit banding offers any advantage over declaring as a standard that writes to addresses 0x21000000-21FFFFFF behave as set-bits-only versions of corresponding addresses 0x20000000-20FFFFFF, and likewise writes to 0x22000000-0x22FFFFFF would behave as clear-bits-only; one could do likewise with RAM. Such an implementation could probably be simpler and cheaper than bit-banding (since it would only require feeding each peripheral or memory a write-high-bits and write-low-bits write-enable signals) but that's not how ARM did things.