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Hi,
Using the STM32F103ZE USART2.
The usart interrupt handler is called when receiving data and when transmitting data, but...
my interrupt handler exclusively first checks for received data (bit RXNE) and if not there it checks then for transmitted data (bit TXE) in the status register. The RXNE is continuously detected as I do not read the rx databuffer. But if meanwhile sending data to the usart the RXNE bit is never detected although evaluated first. My interrupthandler, after having checked for both bits, waits for 1 second just using a loop.
If I disable the TXE interrupt then the RXNE is detected.
Why?
Henk
ERRATA:
my interrupt handler exclusively first checks for received data (bit RXNE) and if not there it checks then for transmitted data (bit TXE) in the status register.
[errata] The TXE is continuously detected as I do not write to the Tx databuffer. [/errata]
But if meanwhile sending data to the usart the RXNE bit is never detected although evaluated first. My interrupthandler, after having checked for both bits, waits for 1 second just using a loop.
My interrupthandler, after having checked for both bits, waits for 1 second just using a loop.
What are you doing there? I understand that you have nested interrupts enabled so your system is not blocked, but is it a good idea to wait for 1 second in an ISR? When are you not using the registers (that I assume is available; never used your chip) indicating the source of the interrupt (CTI, RDA etc.) ?
I'm just trying to understand USART interrupt behaviour by switching on Leds inside the interrupt handler depending on which interrupt is detected. So to not have fast interrupts following each other I just put a for-loop inside the handler. I know that's not the usual way. As the tx-interrupt is not solved the USART interrupt will be called immediately after it has been finished. I just was wondering if in meantime incoming serial data is sampled. I think it is not. Probably the uC needs at least some non-interrupt (USART peripheral or Alternate Function) clock cycles to detect incoming data? Just curious to find out.