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Understanding PC (R15) register [ARM7]

Xalph Sudonym

Hi,
In startup code the first instruction is:

org 0x00
ldr pc,[pc,#24]


and at offset address 0x20:

org 0x20
dc32 ?cstartup

What I don't understand here is, after the first instruction shown above how come PC holds 0x20 and not 0x18??
Isn't PC supposed to be pointing to the current instruction being executed? If that's the case after the above step shouldn't PC be
(0x00 + #24)= (0x00 + 0x18) = 0x18 ??

Thanks.

Parents
  • 0 in reply to Tamir Michael

    PC is always 8 bytes ahead!
    You mean PC points to the (next) instruction to be fetched and not the current instruction being executed. This is what even I have always heard.

    I tried to make sense of it:

    Pipeline------Addr---Instruction
Status
---------------------------------
to Execute-----0-----ldr pc, [pc,#24]
to Decode------4-----xyz_instr
to Fetch-------8-----xyz_instr1

    So PC here (in the ldr instruction) is 0x0000 0008
    (Again, if it were THUMB mode then PC would be 0x0000 0004)
    Hence, PC + #24 = PC + 0x18 = 0x08 + 0x18 = 0x20

    Thanks for your support :)

Reply
  • 0 in reply to Tamir Michael

    PC is always 8 bytes ahead!
    You mean PC points to the (next) instruction to be fetched and not the current instruction being executed. This is what even I have always heard.

    I tried to make sense of it:

    Pipeline------Addr---Instruction
Status
---------------------------------
to Execute-----0-----ldr pc, [pc,#24]
to Decode------4-----xyz_instr
to Fetch-------8-----xyz_instr1

    So PC here (in the ldr instruction) is 0x0000 0008
    (Again, if it were THUMB mode then PC would be 0x0000 0004)
    Hence, PC + #24 = PC + 0x18 = 0x08 + 0x18 = 0x20

    Thanks for your support :)

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