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stm32 3 complementary PWM signals problem

when simulating stm32 on keil for stm32 3 complementary PWM signals all negative outputs shows spike signals on second and third master pwm outputs porta.9 and porta.10. spike signals is an unwanted result. code is below as given offical stm32 firmware library

related output pictures shown links below...

earth.prohosting.com/.../spikes.gif

earth.prohosting.com/.../spikes2.gif

* -----------------------------------------------------------------------
TIM1 Configuration to:

1/ Generate 3 complementary PWM signals with 3 different duty cycles:
TIM1CLK = 72 MHz, Prescaler = 0, TIM1 counter clock = 72 MHz
TIM1 frequency = TIM1CLK/(TIM1_Period + 1) = 1.098 KHz

TIM1 Channel1 duty cycle = TIM1->CCR1 / TIM1_Period = 50%
TIM1 Channel1N duty cycle = (TIM1_Period - TIM1_CCR1) / (TIM1_Period + 1) = 50%

TIM1 Channel2 duty cycle = TIM1_CCR2 / TIM1_Period = 25%
TIM1 Channel2N duty cycle = (TIM1_Period - TIM1_CCR1) / (TIM1_Period + 1) = 75%

TIM1 Channel3 duty cycle = TIM1_CCR3 / TIM1_Period = 12.5%
TIM1 Channel3N duty cycle = (TIM1_Period - TIM1_CCR3) / (TIM1_Period + 1) = 87.5%

2/ Insert a dead time equal to 1.62 us
3/ Configure the break feature, active at High level, and using the automatic
output enable feature
4/ Use the Locking parametres level1.
----------------------------------------------------------------------- */

/* Time Base configuration */
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_Period = 65535;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;

TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);

/* Channel 1, 2,3 and 4 Configuration in PWM mode */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
TIM_OCInitStructure.TIM_Pulse = CCR1_Val;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;

TIM_OC1Init(TIM1, &TIM_OCInitStructure);

TIM_OCInitStructure.TIM_Pulse = CCR2_Val;
TIM_OC2Init(TIM1, &TIM_OCInitStructure);

TIM_OCInitStructure.TIM_Pulse = CCR3_Val;
TIM_OC3Init(TIM1, &TIM_OCInitStructure);

/* Automatic Output enable, Break, dead time and lock configuration*/
TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_1;
TIM_BDTRInitStructure.TIM_DeadTime = 117;
TIM_BDTRInitStructure.TIM_Break = TIM_Break_Enable;
TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High;
TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Enable;

TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);

/* TIM1 counter enable */
TIM_Cmd(TIM1, ENABLE);

/* Main Output Enable */
TIM_CtrlPWMOutputs(TIM1, ENABLE);