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Hi,
I use below macro #define SFRX(Sfr,Msk) (Sfr=((Sfr & (~ ((Msk)>>8)) ) |(Msk))) to simply both Set and Reset specified bits in some register.
If I write SFRX ( MyReg , 0x0100 ) this macro clears bit 0. If I write SFRX ( MyReg , 0x0002 ) this macro set bit 1. If I write SFRX ( MyReg , 0x0102 ) this macro clears bit 0 and sets bit 1 in one go whithout affecting other bits.
Now I would like to use this macro for a 32-bits system: #define SREG(Reg,Msk) (Sfr=((Sfr & (~ ((Msk)>>32)) ) |(Msk)))
Although the compiler warns that shifting is too long it works fine. (main.c(56): warning: #63-D: shift count is too large)
My question is: how do I prevent this warning to occur?
Thanks
Henk
Well that was my first idea and then I came up with this new one I showed in my first posting:
#define MOTOR_LEFT_ON 0x0001 #define MOTOR_LEFT_OFF 0x0100 #define MOTOR_RIGHT_ON 0x0002 #define MOTOR_RIGHT_OFF 0x0200
Controlling some machine: SFRX ( MyReg , MOTOR_LEFT_ON | MOTOR_RIGHT_OFF ); equals SFRX ( MyReg , MOTOR_RIGHT_OFF | MOTOR_LEFT_ON );
The advantage of my new system is that it does not matter where to put the SET or CLR bits, any sequence will do.
Regards,
The disadvantage is of course that the code is very hard to read, since the code performs a very non-intuitive operation.
Why not instead create (assuming that one motor may need multiple bits):
MaskAndSet(MOTOR_LEFT_MASK|MOTOR_RIGHT_MASK,MOTOR_LEFT_ON|MOTOR_RIGHT_OFF);
or if each motor only have one bit:
MotorsOffOn(MOTOR_RIGHT,MOTOR_LEFT);
Your SFRX #define does not give any indication what it does - at best it looks like it performs a set operation, i.e. Sfr = Msk.
In the general case, you can't just assume that the preprocessor is able to process data of twice the register size. Let's say you have a 64-bit processor where int and long are both 64 bits - why should the preprocessor then support 128-bit integers? Or a 32-bit processor may have 32-bit int and long - why should it have 64-bit support in the preprocessor?